diff options
| author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2018-07-03 19:46:58 +0900 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-07-06 16:37:19 +0200 |
| commit | 5f9810730cf4c0315f30e2fa0daf273fb2d3cadb (patch) | |
| tree | 4867dc1564c7524aa62ed507a9fb7c1ecb15563e | |
| parent | ed8603e11124ea2f5626e29d09680afcac71a9bb (diff) | |
usb: host: xhci-rcar: Add a condition check about PLL active
This patch adds a condition check about the PLL acvice of this
controller. Otherwise, the controller might cause hang when
any USB clocks are not supplied yet and accesses the xHCI registers.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/usb/host/xhci-rcar.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c index 4a22f25ce970..a6e463715779 100644 --- a/drivers/usb/host/xhci-rcar.c +++ b/drivers/usb/host/xhci-rcar.c @@ -29,6 +29,7 @@ MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V2); MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V3); /*** Register Offset ***/ +#define RCAR_USB3_AXH_STA 0x104 /* AXI Host Control Status */ #define RCAR_USB3_INT_ENA 0x224 /* Interrupt Enable */ #define RCAR_USB3_DL_CTRL 0x250 /* FW Download Control & Status */ #define RCAR_USB3_FW_DATA0 0x258 /* FW Data0 */ @@ -41,6 +42,12 @@ MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V3); #define RCAR_USB3_TX_POL 0xab8 /* USB3.0 TX Polarity */ /*** Register Settings ***/ +/* AXI Host Control Status */ +#define RCAR_USB3_AXH_STA_B3_PLL_ACTIVE 0x00010000 +#define RCAR_USB3_AXH_STA_B2_PLL_ACTIVE 0x00000001 +#define RCAR_USB3_AXH_STA_PLL_ACTIVE_MASK (RCAR_USB3_AXH_STA_B3_PLL_ACTIVE | \ + RCAR_USB3_AXH_STA_B2_PLL_ACTIVE) + /* Interrupt Enable */ #define RCAR_USB3_INT_XHC_ENA 0x00000001 #define RCAR_USB3_INT_PME_ENA 0x00000002 @@ -200,6 +207,22 @@ static int xhci_rcar_download_firmware(struct usb_hcd *hcd) return retval; } +static bool xhci_rcar_wait_for_pll_active(struct usb_hcd *hcd) +{ + int timeout = 1000; + u32 val, mask = RCAR_USB3_AXH_STA_PLL_ACTIVE_MASK; + + while (timeout > 0) { + val = readl(hcd->regs + RCAR_USB3_AXH_STA); + if ((val & mask) == mask) + return true; + udelay(1); + timeout--; + } + + return false; +} + /* This function needs to initialize a "phy" of usb before */ int xhci_rcar_init_quirk(struct usb_hcd *hcd) { @@ -220,6 +243,9 @@ int xhci_rcar_init_quirk(struct usb_hcd *hcd) xhci_rcar_is_gen3(hcd->self.controller)) xhci->quirks |= XHCI_NO_64BIT_SUPPORT; + if (!xhci_rcar_wait_for_pll_active(hcd)) + return -ETIMEDOUT; + return xhci_rcar_download_firmware(hcd); } |