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authorSuman Kumar Chakraborty <suman.kumar.chakraborty@intel.com>2025-07-10 14:33:40 +0100
committerHerbert Xu <herbert@gondor.apana.org.au>2025-07-18 20:52:00 +1000
commit63fa7c4dc0ea965d0a17fdbf51e5b421f61000fe (patch)
tree9b11cb151bbdcfed2dc2b9690ecd2f883e3542cf
parentf0ae287c50455f7be0d8dd45a803d403c7aa4d2e (diff)
crypto: qat - validate service in rate limiting sysfs api
The sysfs interface 'qat_rl/srv' currently allows all valid services, even if a service is not configured for the device. This leads to a failure when attempting to add the SLA using 'qat_rl/sla_op'. Add a check using is_service_enabled() to ensure the requested service is enabled. If not, return -EINVAL to prevent invalid configurations. Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--drivers/crypto/intel/qat/qat_common/adf_rl.c3
-rw-r--r--drivers/crypto/intel/qat/qat_common/adf_rl.h1
-rw-r--r--drivers/crypto/intel/qat/qat_common/adf_sysfs_rl.c8
3 files changed, 10 insertions, 2 deletions
diff --git a/drivers/crypto/intel/qat/qat_common/adf_rl.c b/drivers/crypto/intel/qat/qat_common/adf_rl.c
index e782c23fc1bf..d320bfcb9919 100644
--- a/drivers/crypto/intel/qat/qat_common/adf_rl.c
+++ b/drivers/crypto/intel/qat/qat_common/adf_rl.c
@@ -209,8 +209,7 @@ u32 adf_rl_get_sla_arr_of_type(struct adf_rl *rl_data, enum rl_node_type type,
}
}
-static bool is_service_enabled(struct adf_accel_dev *accel_dev,
- enum adf_base_services rl_srv)
+bool is_service_enabled(struct adf_accel_dev *accel_dev, enum adf_base_services rl_srv)
{
enum adf_cfg_service_type arb_srv = srv_to_cfg_svc_type(rl_srv);
struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);
diff --git a/drivers/crypto/intel/qat/qat_common/adf_rl.h b/drivers/crypto/intel/qat/qat_common/adf_rl.h
index bfe750ea0e83..9b4678cee1fd 100644
--- a/drivers/crypto/intel/qat/qat_common/adf_rl.h
+++ b/drivers/crypto/intel/qat/qat_common/adf_rl.h
@@ -175,5 +175,6 @@ u32 adf_rl_calculate_ae_cycles(struct adf_accel_dev *accel_dev, u32 sla_val,
enum adf_base_services svc_type);
u32 adf_rl_calculate_slice_tokens(struct adf_accel_dev *accel_dev, u32 sla_val,
enum adf_base_services svc_type);
+bool is_service_enabled(struct adf_accel_dev *accel_dev, enum adf_base_services rl_srv);
#endif /* ADF_RL_H_ */
diff --git a/drivers/crypto/intel/qat/qat_common/adf_sysfs_rl.c b/drivers/crypto/intel/qat/qat_common/adf_sysfs_rl.c
index bedb514d4e30..a8c3be24b3b4 100644
--- a/drivers/crypto/intel/qat/qat_common/adf_sysfs_rl.c
+++ b/drivers/crypto/intel/qat/qat_common/adf_sysfs_rl.c
@@ -291,14 +291,22 @@ static ssize_t srv_show(struct device *dev, struct device_attribute *attr,
static ssize_t srv_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
+ struct adf_accel_dev *accel_dev;
unsigned int val;
int ret;
+ accel_dev = adf_devmgr_pci_to_accel_dev(to_pci_dev(dev));
+ if (!accel_dev)
+ return -EINVAL;
+
ret = sysfs_match_string(rl_services, buf);
if (ret < 0)
return ret;
val = ret;
+ if (!is_service_enabled(accel_dev, val))
+ return -EINVAL;
+
ret = set_param_u(dev, SRV, val);
if (ret)
return ret;