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authorKuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>2025-11-20 16:05:39 -0800
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2025-11-21 21:47:08 +0100
commit748d6ba43afde7e9ac27443233203995cc15d235 (patch)
tree37512b2b58d9150262acebd8d1f1dfc4b058c8fa
parent1d6c915819f5b805c35487b6ce5923e31a28266b (diff)
powercap: intel_rapl: Enable MSR-based RAPL PMU support
Currently, RAPL PMU support requires adding CPU model entries to arch/x86/events/rapl.c for each new generation. However, RAPL MSRs are not architectural and require platform-specific customization, making arch/x86 an inappropriate location for this functionality. The powercap subsystem already handles RAPL functionality and is the natural place to consolidate all RAPL features. The powercap RAPL driver already includes PMU support for TPMI-based RAPL interfaces, making it straightforward to extend this support to MSR-based RAPL interfaces as well. This consolidation eliminates the need to maintain RAPL support in multiple subsystems and provides a unified approach for both TPMI and MSR-based RAPL implementations. The MSR-based PMU support includes the following updates: 1. Register MSR-based PMU support for the supported platforms and unregister it when no online CPUs remain in the package. 2. Remove existing checks that restrict RAPL PMU support to TPMI-based interfaces and extend the logic to allow MSR-based RAPL interfaces. 3. Define a CPU model list to determine which processors should register RAPL PMU interface through the powercap driver for MSR-based RAPL, excluding those that support TPMI interface. This list prevents conflicts with existing arch/x86 PMU code that already registers RAPL PMU for some processors. Add Panther Lake & Wildcat Lake to the CPU models list. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> [ rjw: Changelog edits ] Link: https://patch.msgid.link/20251121000539.386069-3-sathyanarayanan.kuppuswamy@linux.intel.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-rw-r--r--drivers/powercap/intel_rapl_common.c12
-rw-r--r--drivers/powercap/intel_rapl_msr.c24
2 files changed, 28 insertions, 8 deletions
diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_rapl_common.c
index 47ec34d4c099..b9d87e56cbbc 100644
--- a/drivers/powercap/intel_rapl_common.c
+++ b/drivers/powercap/intel_rapl_common.c
@@ -1597,11 +1597,11 @@ static int get_pmu_cpu(struct rapl_package *rp)
if (!rp->has_pmu)
return nr_cpu_ids;
- /* Only TPMI RAPL is supported for now */
- if (rp->priv->type != RAPL_IF_TPMI)
+ /* Only TPMI & MSR RAPL are supported for now */
+ if (rp->priv->type != RAPL_IF_TPMI && rp->priv->type != RAPL_IF_MSR)
return nr_cpu_ids;
- /* TPMI RAPL uses any CPU in the package for PMU */
+ /* TPMI/MSR RAPL uses any CPU in the package for PMU */
for_each_online_cpu(cpu)
if (topology_physical_package_id(cpu) == rp->id)
return cpu;
@@ -1614,11 +1614,11 @@ static bool is_rp_pmu_cpu(struct rapl_package *rp, int cpu)
if (!rp->has_pmu)
return false;
- /* Only TPMI RAPL is supported for now */
- if (rp->priv->type != RAPL_IF_TPMI)
+ /* Only TPMI & MSR RAPL are supported for now */
+ if (rp->priv->type != RAPL_IF_TPMI && rp->priv->type != RAPL_IF_MSR)
return false;
- /* TPMI RAPL uses any CPU in the package for PMU */
+ /* TPMI/MSR RAPL uses any CPU in the package for PMU */
return topology_physical_package_id(cpu) == rp->id;
}
diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rapl_msr.c
index 6e3c50af0912..0ce1096b6314 100644
--- a/drivers/powercap/intel_rapl_msr.c
+++ b/drivers/powercap/intel_rapl_msr.c
@@ -33,6 +33,8 @@
/* private data for RAPL MSR Interface */
static struct rapl_if_priv *rapl_msr_priv;
+static bool rapl_msr_pmu __ro_after_init;
+
static struct rapl_if_priv rapl_msr_priv_intel = {
.type = RAPL_IF_MSR,
.reg_unit.msr = MSR_RAPL_POWER_UNIT,
@@ -79,6 +81,8 @@ static int rapl_cpu_online(unsigned int cpu)
rp = rapl_add_package_cpuslocked(cpu, rapl_msr_priv, true);
if (IS_ERR(rp))
return PTR_ERR(rp);
+ if (rapl_msr_pmu)
+ rapl_package_add_pmu(rp);
}
cpumask_set_cpu(cpu, &rp->cpumask);
return 0;
@@ -95,10 +99,14 @@ static int rapl_cpu_down_prep(unsigned int cpu)
cpumask_clear_cpu(cpu, &rp->cpumask);
lead_cpu = cpumask_first(&rp->cpumask);
- if (lead_cpu >= nr_cpu_ids)
+ if (lead_cpu >= nr_cpu_ids) {
+ if (rapl_msr_pmu)
+ rapl_package_remove_pmu(rp);
rapl_remove_package_cpuslocked(rp);
- else if (rp->lead_cpu == cpu)
+ } else if (rp->lead_cpu == cpu) {
rp->lead_cpu = lead_cpu;
+ }
+
return 0;
}
@@ -171,6 +179,13 @@ static const struct x86_cpu_id pl4_support_ids[] = {
{}
};
+/* List of MSR-based RAPL PMU support CPUs */
+static const struct x86_cpu_id pmu_support_ids[] = {
+ X86_MATCH_VFM(INTEL_PANTHERLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_WILDCATLAKE_L, NULL),
+ {}
+};
+
static int rapl_msr_probe(struct platform_device *pdev)
{
const struct x86_cpu_id *id = x86_match_cpu(pl4_support_ids);
@@ -198,6 +213,11 @@ static int rapl_msr_probe(struct platform_device *pdev)
pr_info("PL4 support detected.\n");
}
+ if (x86_match_cpu(pmu_support_ids)) {
+ rapl_msr_pmu = true;
+ pr_info("MSR-based RAPL PMU support enabled\n");
+ }
+
rapl_msr_priv->control_type = powercap_register_control_type(NULL, "intel-rapl", NULL);
if (IS_ERR(rapl_msr_priv->control_type)) {
pr_debug("failed to register powercap control_type.\n");