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authorYash Shah <yash.shah@sifive.com>2020-12-08 10:25:34 +0530
committerMark Brown <broonie@kernel.org>2020-12-08 14:21:51 +0000
commit76347344c522da78be29403dda81463ffae2bc99 (patch)
treeaf4bf130b3166b77fc0272b1c7e8519a3557102a
parentc732b7567d8698f10e988ed89fd9f107c739dbee (diff)
spi: Update DT binding docs to support SiFive FU740 SoC
Add new compatible strings to the DT binding documents to support SiFive FU740-C000. Signed-off-by: Yash Shah <yash.shah@sifive.com> Link: https://lore.kernel.org/r/1607403341-57214-3-git-send-email-yash.shah@sifive.com Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--Documentation/devicetree/bindings/spi/spi-sifive.yaml10
1 files changed, 6 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-sifive.yaml b/Documentation/devicetree/bindings/spi/spi-sifive.yaml
index 56dcf1d35da4..6e7e394fc1e4 100644
--- a/Documentation/devicetree/bindings/spi/spi-sifive.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-sifive.yaml
@@ -17,15 +17,17 @@ allOf:
properties:
compatible:
items:
- - const: sifive,fu540-c000-spi
+ - enum:
+ - sifive,fu540-c000-spi
+ - sifive,fu740-c000-spi
- const: sifive,spi0
description:
Should be "sifive,<chip>-spi" and "sifive,spi<version>".
Supported compatible strings are -
- "sifive,fu540-c000-spi" for the SiFive SPI v0 as integrated
- onto the SiFive FU540 chip, and "sifive,spi0" for the SiFive
- SPI v0 IP block with no chip integration tweaks.
+ "sifive,fu540-c000-spi" and "sifive,fu740-c000-spi" for the SiFive SPI v0
+ as integrated onto the SiFive FU540 and FU740 chip resp, and "sifive,spi0"
+ for the SiFive SPI v0 IP block with no chip integration tweaks.
Please refer to sifive-blocks-ip-versioning.txt for details
SPI RTL that corresponds to the IP block version numbers can be found here -