summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAlex Bee <knaerzche@gmail.com>2023-08-29 22:37:23 +0200
committerHeiko Stuebner <heiko@sntech.de>2023-10-04 23:23:38 +0200
commit7e3be9ea299927e6d65242c247eca0a21bc26a58 (patch)
treea4e855fc2bf95835a5884dfa90e60e673d8f82a7
parent2e9cbc4167da3134412ce47e4cdadbfdea30bbff (diff)
ARM: dts: rockchip: Add missing arm timer interrupt for RK3128
The Cortex-A7 timer has 4 interrupts. Add the missing one. Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi") Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829203721.281455-8-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm/boot/dts/rockchip/rk3128.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
index 2e345097b9bd..bf55d4575311 100644
--- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
@@ -64,7 +64,8 @@
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
arm,cpu-registers-not-fw-configured;
clock-frequency = <24000000>;
};