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| author | Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> | 2016-03-09 14:17:20 +0530 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2016-03-10 10:31:21 +0700 |
| commit | 82b3aea65f9fee161d8e07602e5a8c7b0b103fa3 (patch) | |
| tree | a837e160b0d04216700a7a6e25ac39719c72d177 | |
| parent | 92e963f50fc74041b5e9e744c330dca48e04f08d (diff) | |
spi: xilinx: Add devicetree binding for spi-xilinx
Add a binding document for the spi/spi-xilinx
Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/spi/spi-xilinx.txt | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-xilinx.txt b/Documentation/devicetree/bindings/spi/spi-xilinx.txt new file mode 100644 index 000000000000..c7b7856bd528 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-xilinx.txt @@ -0,0 +1,22 @@ +Xilinx SPI controller Device Tree Bindings +------------------------------------------------- + +Required properties: +- compatible : Should be "xlnx,xps-spi-2.00.a" or "xlnx,xps-spi-2.00.b" +- reg : Physical base address and size of SPI registers map. +- interrupts : Property with a value describing the interrupt + number. +- interrupt-parent : Must be core interrupt controller + +Optional properties: +- xlnx,num-ss-bits : Number of chip selects used. + +Example: + axi_quad_spi@41e00000 { + compatible = "xlnx,xps-spi-2.00.a"; + interrupt-parent = <&intc>; + interrupts = <0 31 1>; + reg = <0x41e00000 0x10000>; + xlnx,num-ss-bits = <0x1>; + }; + |