diff options
| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-05-08 18:56:17 +0100 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-06-14 11:53:15 +0100 |
| commit | 8966b11e5a14aaabc747ee97a7942fd50a681402 (patch) | |
| tree | 6100050194f387d70807de5c4e2e752020c1520e | |
| parent | dd54ba8b2469f6ae665c529623a9454ce5293ca8 (diff) | |
iio: adc: ti-ads8344: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-38-jic23@kernel.org
| -rw-r--r-- | drivers/iio/adc/ti-ads8344.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/adc/ti-ads8344.c b/drivers/iio/adc/ti-ads8344.c index c96d2a9ba924..bbd85cb47f81 100644 --- a/drivers/iio/adc/ti-ads8344.c +++ b/drivers/iio/adc/ti-ads8344.c @@ -28,7 +28,7 @@ struct ads8344 { */ struct mutex lock; - u8 tx_buf ____cacheline_aligned; + u8 tx_buf __aligned(IIO_DMA_MINALIGN); u8 rx_buf[3]; }; |