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authorGustave Monce <gustave.monce@outlook.com>2021-01-31 02:38:43 +0100
committerBjorn Andersson <bjorn.andersson@linaro.org>2021-02-02 16:37:38 -0600
commit8b65237e4e1b1c44f7be30bfcc4b61a6ee7f3198 (patch)
tree3f6e93a6d41e2bccc9a5ee2ca1bc11833633ddf6
parent09179fb6aff47bf61db621dde06b51361a8a8f6b (diff)
arm64: dts: qcom: msm8994-octagon: Configure Lattice iCE40 FPGA
Octagon devices have a Lattice iCE40 FPGA connected over SPI. Configure it. Signed-off-by: Gustave Monce <gustave.monce@outlook.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210131013853.55810-13-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
-rw-r--r--arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
index 730bd473be6b..0417c31316d3 100644
--- a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
@@ -304,6 +304,27 @@
status = "okay";
};
+&blsp2_spi4 {
+ status = "okay";
+
+ /*
+ * This device is a Lattice UC120 USB-C PD PHY.
+ * It is actually a Lattice iCE40 FPGA pre-programmed by
+ * the device firmware with a specific bitstream
+ * enabling USB Type C PHY functionality.
+ * Communication is done via a proprietary protocol over SPI.
+ *
+ * TODO: Once a proper driver is available, replace this.
+ */
+ uc120: ice5lp2k@0 {
+ compatible = "lattice,ice40-fpga-mgr";
+ reg = <0>;
+ spi-max-frequency = <5000000>;
+ cdone-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&pmi8994_gpios 4 GPIO_ACTIVE_LOW>;
+ };
+};
+
&blsp2_uart2 {
status = "okay";