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authorSai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>2021-09-24 15:37:09 +0530
committerMark Brown <broonie@kernel.org>2021-10-01 20:50:50 +0100
commit8db76cfae1004f5476d9c35670f0a0f084c6b73f (patch)
tree57846f77103174d687cd1432cd9aff752bab20c6
parent74e78adc6ccf6c3b53939788cf0c49f54db70731 (diff)
dt-bindings: spi: cadence-quadspi: Add support for Xilinx Versal OSPI
Add new compatible to support Cadence Octal SPI(OSPI) controller on Xilinx Versal SoCs, also add power-domains property to the properties list and marked as required for Xilinx Versal OSPI compatible. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/1632478031-12242-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml12
1 files changed, 12 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
index 0e7087cc8bf9..ca155abbda7a 100644
--- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
@@ -11,6 +11,14 @@ maintainers:
allOf:
- $ref: spi-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: xlnx,versal-ospi-1.0
+ then:
+ required:
+ - power-domains
properties:
compatible:
@@ -20,6 +28,7 @@ properties:
- ti,k2g-qspi
- ti,am654-ospi
- intel,lgm-qspi
+ - xlnx,versal-ospi-1.0
- const: cdns,qspi-nor
- const: cdns,qspi-nor
@@ -65,6 +74,9 @@ properties:
data rather than the QSPI clock. Make sure that QSPI return clock
is populated on the board before using this property.
+ power-domains:
+ maxItems: 1
+
resets:
maxItems: 2