diff options
| author | Yoshihiro Kaneko <ykaneko0929@gmail.com> | 2018-10-15 23:12:26 +0900 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2018-11-26 09:11:44 +0100 |
| commit | 8f1ee2a166f88388fd3b20698958334be357aa52 (patch) | |
| tree | 71ef7d38b16bcafee9af2a04219491a4e1b897cd | |
| parent | 8fbe048bd95b560ed5fcb8eaa80456a64aeb66a2 (diff) | |
arm64: dts: renesas: r8a77990: add thermal device support
This patch adds the thermal device node and the thermal-zone for
the R8A77990 SoC.
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77990.dtsi | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index de25eda4f2f4..b2f606e286ce 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -409,6 +409,18 @@ #power-domain-cells = <1>; }; + thermal: thermal@e6190000 { + compatible = "renesas,thermal-r8a77990"; + reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 522>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 522>; + #thermal-sensor-cells = <0>; + }; + intc_ex: interrupt-controller@e61c0000 { compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; #interrupt-cells = <2>; @@ -1745,6 +1757,25 @@ }; }; + thermal-zones { + cpu-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&thermal>; + + trips { + cpu-crit { + temperature = <120000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |