summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAllen-KH Cheng <allen-kh.cheng@mediatek.com>2023-01-18 17:18:27 +0800
committerMatthias Brugger <matthias.bgg@gmail.com>2023-01-19 17:37:36 +0100
commit90e75e8284061a0102b17ace7faa88605885c076 (patch)
treeb990f77e9b478fbe898ec4bda0c1286ad3b20013
parent18942d29f98b9f54501616d48b69ffcd04230c01 (diff)
arm64: dts: mediatek: mt8186: Add DPI node
Add DPI node for MT8186 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230118091829.755-8-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8186.dtsi17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index cc310f0c314d..c9124bb0c960 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -1116,6 +1116,23 @@
power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
+ dpi: dpi@1400a000 {
+ compatible = "mediatek,mt8186-dpi";
+ reg = <0 0x1400a000 0 0x1000>;
+ clocks = <&topckgen CLK_TOP_DPI>,
+ <&mmsys CLK_MM_DISP_DPI>,
+ <&apmixedsys CLK_APMIXED_TVDPLL>;
+ clock-names = "pixel", "engine", "pll";
+ assigned-clocks = <&topckgen CLK_TOP_DPI>;
+ assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>;
+ interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_LOW 0>;
+ status = "disabled";
+
+ port {
+ dpi_out: endpoint { };
+ };
+ };
+
dsi0: dsi@14013000 {
compatible = "mediatek,mt8186-dsi";
reg = <0 0x14013000 0 0x1000>;