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authorRoman Li <Roman.Li@amd.com>2017-03-24 16:26:09 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 17:21:17 -0400
commit940c654e64e1ed70b49ec663f2370a8b4de6d2ac (patch)
tree9f859fe6288e131b3d3979451b4feadc13e2a8a2
parentfd8cc371ede63d69cf69bb3a8a9a005d91ae023f (diff)
drm/amd/display: increase timeout for dmif dealloc
In some use-cases, e.g. multiple 4K displays, exisitng wait time for reg update of 30msec timed out during mode setiing that sometimes resulted in system bad state as we continue without waiting for registry update complete. Increasing timeout to 35msec fixes that problem. Signed-off-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
index 7acd87152811..884f453d91b0 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
@@ -524,7 +524,7 @@ void dce_mem_input_free_dmif(struct mem_input *mi,
REG_WAIT(DMIF_BUFFER_CONTROL,
DMIF_BUFFERS_ALLOCATION_COMPLETED, 1,
- 10, 0xBB8);
+ 10, 3500);
if (mi->wa.single_head_rdreq_dmif_limit) {
uint32_t eanble = (total_stream_num > 1) ? 0 :