diff options
author | Bartosz Golaszewski <bartosz.golaszewski@linaro.org> | 2023-09-13 17:35:29 +0200 |
---|---|---|
committer | Bjorn Andersson <andersson@kernel.org> | 2023-09-20 09:40:33 -0700 |
commit | 96272ba7103d4518e2d0f17daf6fe0008fc6e12c (patch) | |
tree | 1291e47de247a568efaa9dc8c673d1b7c0823b38 | |
parent | e3c6386c6a5d0187f103fc9bf39850ac15c01690 (diff) |
arm64: dts: qcom: sa8775p: enable the inline crypto engine
Add an ICE node to sa8775p SoC description and enable it by adding a
phandle to the UFS node.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230913153529.32777-2-bartosz.golaszewski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-rw-r--r-- | arch/arm64/boot/dts/qcom/sa8775p.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 9f4f58e831a4..b6a93b11cbbd 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -1525,6 +1525,7 @@ <0 0>, <0 0>, <0 0>; + qcom,ice = <&ice>; status = "disabled"; }; @@ -1546,6 +1547,13 @@ status = "disabled"; }; + ice: crypto@1d88000 { + compatible = "qcom,sa8775p-inline-crypto-engine", + "qcom,inline-crypto-engine"; + reg = <0x0 0x01d88000 0x0 0x8000>; + clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + }; + usb_0_hsphy: phy@88e4000 { compatible = "qcom,sa8775p-usb-hs-phy", "qcom,usb-snps-hs-5nm-phy"; |