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authorJames Hogan <james.hogan@imgtec.com>2012-10-05 12:33:07 +0100
committerJames Hogan <james.hogan@imgtec.com>2013-06-27 13:49:49 +0100
commit9630fa9fe6fec46b498d0784f00f8ef2bbd5b6ec (patch)
tree13572e96a803ff70d874808f5ec299f1b751792e
parentf43b059d8dfb90f7c87b88eff0a57f5a79dd87ff (diff)
metag: tz1090: select and instantiate pinctrl-tz1090
Select PINCTRL and PINCTRL_TZ1090 from SOC_TZ1090 to enable the main pin controller driver once it is merged, and instantiate it from tz1090.dtsi. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Grant Likely <grant.likely@linaro.org>
-rw-r--r--arch/metag/Kconfig.soc2
-rw-r--r--arch/metag/boot/dts/tz1090.dtsi6
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/metag/Kconfig.soc b/arch/metag/Kconfig.soc
index 653b47917caf..6b11ca363ceb 100644
--- a/arch/metag/Kconfig.soc
+++ b/arch/metag/Kconfig.soc
@@ -19,6 +19,8 @@ config SOC_TZ1090
select METAG_LNKGET_AROUND_CACHE
select METAG_META21
select METAG_SMP_WRITE_REORDERING
+ select PINCTRL
+ select PINCTRL_TZ1090
help
This is a Toumaz Technology Xenif TZ1090 (A.K.A. Comet) SoC containing
a 2-threaded HTP.
diff --git a/arch/metag/boot/dts/tz1090.dtsi b/arch/metag/boot/dts/tz1090.dtsi
index ff7bb74abc4b..697f3840e4d8 100644
--- a/arch/metag/boot/dts/tz1090.dtsi
+++ b/arch/metag/boot/dts/tz1090.dtsi
@@ -25,5 +25,11 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
+
+ pinctrl: pinctrl@02005800 {
+ #gpio-range-cells = <3>;
+ compatible = "img,tz1090-pinctrl";
+ reg = <0x02005800 0xe4>;
+ };
};
};