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authorAhmad Othman <ahmad.othman@amd.com>2019-08-01 15:05:04 -0400
committerAlex Deucher <alexander.deucher@amd.com>2022-06-14 21:38:41 -0400
commit9a4c9de4838fd8ccfcfcfdcd7bd472dddd11f264 (patch)
tree7c7d49d06219fddd6e199d2ff7ed5680487526ad
parent28fdd0c32daf9a50a606530d54784fcfa29d88b7 (diff)
drm/amd/display: Adding VTEM to dc
[Why] Video Timing Extended Metadata packet (VTEM) is required for features like VRR and FVA [How] Adding support for VTEM transmission to stream encoders in DCN20 and DCN30 as part of FVA support Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Ahmad Othman <ahmad.othman@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc.c6
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc_resource.c14
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc_stream.h2
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c1
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c1
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h1
6 files changed, 23 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 400b37e393b7..7c2b65226131 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -2661,6 +2661,9 @@ static void copy_stream_update_to_stream(struct dc *dc,
if (update->hfvsif_infopacket)
stream->hfvsif_infopacket = *update->hfvsif_infopacket;
+ if (update->vtem_infopacket)
+ stream->vtem_infopacket = *update->vtem_infopacket;
+
if (update->vsc_infopacket)
stream->vsc_infopacket = *update->vsc_infopacket;
@@ -2736,7 +2739,8 @@ static void commit_planes_do_stream_update(struct dc *dc,
stream_update->vrr_infopacket ||
stream_update->vsc_infopacket ||
stream_update->vsp_infopacket ||
- stream_update->hfvsif_infopacket) {
+ stream_update->hfvsif_infopacket ||
+ stream_update->vtem_infopacket) {
resource_build_info_frame(pipe_ctx);
dc->hwss.update_info_frame(pipe_ctx);
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 9bb0ae0dc836..463ff12adbc8 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -2816,6 +2816,17 @@ static void set_hfvs_info_packet(
*info_packet = stream->hfvsif_infopacket;
}
+
+static void set_vtem_info_packet(
+ struct dc_info_packet *info_packet,
+ struct dc_stream_state *stream)
+{
+ if (!stream->vtem_infopacket.valid)
+ return;
+
+ *info_packet = stream->vtem_infopacket;
+}
+
void dc_resource_state_destruct(struct dc_state *context)
{
int i, j;
@@ -2896,7 +2907,7 @@ void resource_build_info_frame(struct pipe_ctx *pipe_ctx)
info->hdrsmd.valid = false;
info->vsc.valid = false;
info->hfvsif.valid = false;
-
+ info->vtem.valid = false;
signal = pipe_ctx->stream->signal;
/* HDMi and DP have different info packets*/
@@ -2905,6 +2916,7 @@ void resource_build_info_frame(struct pipe_ctx *pipe_ctx)
set_vendor_info_packet(&info->vendor, pipe_ctx->stream);
set_hfvs_info_packet(&info->hfvsif, pipe_ctx->stream);
+ set_vtem_info_packet(&info->vtem, pipe_ctx->stream);
set_spd_info_packet(&info->spd, pipe_ctx->stream);
diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index 376dddf54ec1..c76fac3c153d 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -181,6 +181,7 @@ struct dc_stream_state {
struct dc_info_packet vsc_infopacket;
struct dc_info_packet vsp_infopacket;
struct dc_info_packet hfvsif_infopacket;
+ struct dc_info_packet vtem_infopacket;
uint8_t dsc_packed_pps[128];
struct rect src; /* composition area */
struct rect dst; /* stream addressable area */
@@ -298,6 +299,7 @@ struct dc_stream_update {
struct dc_info_packet *vsc_infopacket;
struct dc_info_packet *vsp_infopacket;
struct dc_info_packet *hfvsif_infopacket;
+ struct dc_info_packet *vtem_infopacket;
bool *dpms_off;
bool integer_scaling_update;
bool *allow_freesync;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
index aab25ca8343a..e8f5c01688ec 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
@@ -159,6 +159,7 @@ static void enc2_stream_encoder_update_hdmi_info_packets(
enc2_update_hdmi_info_packet(enc1, 3, &info_frame->vendor);
enc2_update_hdmi_info_packet(enc1, 4, &info_frame->spd);
enc2_update_hdmi_info_packet(enc1, 5, &info_frame->hdrsmd);
+ enc2_update_hdmi_info_packet(enc1, 6, &info_frame->vtem);
}
static void enc2_stream_encoder_stop_hdmi_info_packets(
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c
index 1a26ce87c16e..25e5c3bc1be9 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c
@@ -212,6 +212,7 @@ void enc3_stream_encoder_update_hdmi_info_packets(
enc3_update_hdmi_info_packet(enc1, 1, &info_frame->vendor);
enc3_update_hdmi_info_packet(enc1, 3, &info_frame->spd);
enc3_update_hdmi_info_packet(enc1, 4, &info_frame->hdrsmd);
+ enc3_update_hdmi_info_packet(enc1, 6, &info_frame->vtem);
}
void enc3_stream_encoder_stop_hdmi_info_packets(
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
index e5fe0f6adc86..e04a51a57c93 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
@@ -77,6 +77,7 @@ struct encoder_info_frame {
struct dc_info_packet gamut;
struct dc_info_packet vendor;
struct dc_info_packet hfvsif;
+ struct dc_info_packet vtem;
/* source product description */
struct dc_info_packet spd;
/* video stream configuration */