diff options
| author | Thierry Reding <treding@nvidia.com> | 2020-06-11 19:09:36 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-06-25 09:26:14 +0200 |
| commit | afd92390fcaa784a6d064f3b07c8d8124e43e5d1 (patch) | |
| tree | 5b054c084e151205a285fe37875edc65559d6d77 | |
| parent | 9d304b0721384219941d9f91815658be2e1750fa (diff) | |
ARM: tegra: Drop display controller parent clocks on Tegra124
The parent clocks are determined by the output that will be used, not by
the display controller that drives the output. On previous generations a
simple RGB output used to be part of the display controller and hence an
explicit parent clock needed to be assigned to the display controller to
drive the RGB output. Starting with Tegra124, that RGB output has been
dropped and the parent clock can therefore be removed from the display
controller device tree nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra124.dtsi | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 1afed8496c95..2c992e8e3594 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -105,9 +105,8 @@ compatible = "nvidia,tegra124-dc"; reg = <0x0 0x54200000 0x0 0x00040000>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&tegra_car TEGRA124_CLK_DISP1>, - <&tegra_car TEGRA124_CLK_PLL_P>; - clock-names = "dc", "parent"; + clocks = <&tegra_car TEGRA124_CLK_DISP1>; + clock-names = "dc"; resets = <&tegra_car 27>; reset-names = "dc"; @@ -120,9 +119,8 @@ compatible = "nvidia,tegra124-dc"; reg = <0x0 0x54240000 0x0 0x00040000>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&tegra_car TEGRA124_CLK_DISP2>, - <&tegra_car TEGRA124_CLK_PLL_P>; - clock-names = "dc", "parent"; + clocks = <&tegra_car TEGRA124_CLK_DISP2>; + clock-names = "dc"; resets = <&tegra_car 26>; reset-names = "dc"; |