diff options
| author | Fabio M. De Francesco <fmdefrancesco@gmail.com> | 2021-04-07 12:04:10 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-04-07 17:09:16 +0200 |
| commit | bfe1e634909e4e55e874ee84220fa5669099e450 (patch) | |
| tree | f6f4eb51b1670d2c7064334cdd23a89a3f330963 | |
| parent | b92ed9dc2b13d76eceaf73f13146e17842bb5fc6 (diff) | |
staging: rtl8723bs: hal: Remove camelcase
Remove camelcase. Issue detected by checkpatch.pl. The symbols aren't
used in other files, so this change doesn't break the driver's code.
Signed-off-by: Fabio M. De Francesco <fmdefrancesco@gmail.com>
Link: https://lore.kernel.org/r/20210407100410.8058-1-fmdefrancesco@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/staging/rtl8723bs/hal/Hal8723BReg.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/staging/rtl8723bs/hal/Hal8723BReg.h b/drivers/staging/rtl8723bs/hal/Hal8723BReg.h index b9aca99478db..616d20106392 100644 --- a/drivers/staging/rtl8723bs/hal/Hal8723BReg.h +++ b/drivers/staging/rtl8723bs/hal/Hal8723BReg.h @@ -112,7 +112,7 @@ #define REG_RSVD3_8723B 0x0168 #define REG_C2HEVT_MSG_NORMAL_8723B 0x01A0 #define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 +#define REG_C2HEVT_CMD_CONTENT_88XX 0x01A2 #define REG_C2HEVT_CMD_LEN_88XX 0x01AE #define REG_C2HEVT_CLEAR_8723B 0x01AF #define REG_MCUTST_1_8723B 0x01C0 @@ -429,13 +429,13 @@ #define IMR_RXFOVW_8723B BIT8 /* Receive FIFO Overflow */ /* 2 ACMHWCTRL 0x05C0 */ -#define AcmHw_HwEn_8723B BIT(0) -#define AcmHw_VoqEn_8723B BIT(1) -#define AcmHw_ViqEn_8723B BIT(2) -#define AcmHw_BeqEn_8723B BIT(3) -#define AcmHw_VoqStatus_8723B BIT(5) -#define AcmHw_ViqStatus_8723B BIT(6) -#define AcmHw_BeqStatus_8723B BIT(7) +#define ACMHW_HWEN_8723B BIT(0) +#define ACMHW_VOQEN_8723B BIT(1) +#define ACMHW_VIQEN_8723B BIT(2) +#define ACMHW_BEQEN_8723B BIT(3) +#define ACMHW_VOQSTATUS_8723B BIT(5) +#define ACMHW_VIQSTATUS_8723B BIT(6) +#define ACMHW_BEQSTATUS_8723B BIT(7) /* 8195 (RCR) Receive Configuration Register (Offset 0x608, 32 bits) */ #define RCR_TCPOFLD_EN BIT25 /* Enable TCP checksum offload */ |