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authorRobert Marko <robimarko@gmail.com>2024-02-28 18:24:10 +0100
committerDavid S. Miller <davem@davemloft.net>2024-03-01 08:56:39 +0000
commitcb28f702960695e26597c332b0e46776e825cc34 (patch)
tree3d4fe1cbe6f447342b980cf599adf52dfc561d75
parentf058b2dd70b1a5503dff899010aeb53b436091e5 (diff)
net: phy: qcom: qca808x: fill in possible_interfaces
Currently QCA808x driver does not fill the possible_interfaces. 2.5G QCA808x support SGMII and 2500Base-X while 1G model only supports SGMII, so fill the possible_interfaces accordingly. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/phy/qcom/qca808x.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/net/phy/qcom/qca808x.c b/drivers/net/phy/qcom/qca808x.c
index a4c61a8e07c3..5048304ccc9e 100644
--- a/drivers/net/phy/qcom/qca808x.c
+++ b/drivers/net/phy/qcom/qca808x.c
@@ -167,6 +167,16 @@ static bool qca808x_is_1g_only(struct phy_device *phydev)
return !!(QCA808X_PHY_CHIP_TYPE_1G & ret);
}
+static void qca808x_fill_possible_interfaces(struct phy_device *phydev)
+{
+ unsigned long *possible = phydev->possible_interfaces;
+
+ __set_bit(PHY_INTERFACE_MODE_SGMII, possible);
+
+ if (!qca808x_is_1g_only(phydev))
+ __set_bit(PHY_INTERFACE_MODE_2500BASEX, possible);
+}
+
static int qca808x_probe(struct phy_device *phydev)
{
struct device *dev = &phydev->mdio.dev;
@@ -231,6 +241,8 @@ static int qca808x_config_init(struct phy_device *phydev)
}
}
+ qca808x_fill_possible_interfaces(phydev);
+
/* Configure adc threshold as 100mv for the link 10M */
return at803x_debug_reg_mask(phydev, QCA808X_PHY_DEBUG_ADC_THRESHOLD,
QCA808X_ADC_THRESHOLD_MASK,