diff options
| author | Radhakrishna Sripada <radhakrishna.sripada@intel.com> | 2021-11-05 17:37:14 -0700 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2021-11-08 15:08:18 -0800 |
| commit | cf9420cb122d055840848b039cbbc303882bc445 (patch) | |
| tree | 9d1d1f1ce8a25d6099ef2cb0ca54b1b5771075b7 | |
| parent | 4fe7907f3775034140a518d1582580926da98ee2 (diff) | |
drm/i915: Fix Memory BW formulae for ADL-P
The earlier update to BW formulae broke ADL-P. Include
display 13 to use TGL path for BW parameters.
Fixes: c64a9a7c05be ("drm/i915: Update memory bandwidth formulae")
Cc: Matt Roper <matthew.d.roper@intel.com>
Reported-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211106003714.17894-1-radhakrishna.sripada@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_bw.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index 15c006194c85..abec394f6869 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.c +++ b/drivers/gpu/drm/i915/display/intel_bw.c @@ -147,7 +147,7 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv, qi->num_points = dram_info->num_qgv_points; qi->num_psf_points = dram_info->num_psf_gv_points; - if (DISPLAY_VER(dev_priv) == 12) + if (DISPLAY_VER(dev_priv) >= 12) switch (dram_info->type) { case INTEL_DRAM_DDR4: qi->t_bl = is_y_tile ? 8 : 4; |