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authorKristina Martsenko <kristina.martsenko@arm.com>2023-05-09 15:22:35 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2023-06-05 17:05:42 +0100
commitd8a324f102cc894fa0df6849504a9023f3ea5da6 (patch)
tree3db6b85f39dd22c050ce63a0957973dade6f2b11
parent3e1dedb29d0f70b0bd10bb83001df8c04fc246eb (diff)
kselftest/arm64: add MOPS to hwcap test
Add the MOPS hwcap to the hwcap kselftest and check that a SIGILL is not generated when the feature is detected. A SIGILL is reliable when the feature is not detected as SCTLR_EL1.MSCEn won't have been set. Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230509142235.3284028-12-kristina.martsenko@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
-rw-r--r--tools/testing/selftests/arm64/abi/hwcap.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c
index 93333a90bf3a..d4ad813fed10 100644
--- a/tools/testing/selftests/arm64/abi/hwcap.c
+++ b/tools/testing/selftests/arm64/abi/hwcap.c
@@ -39,6 +39,20 @@ static void cssc_sigill(void)
asm volatile(".inst 0xdac01c00" : : : "x0");
}
+static void mops_sigill(void)
+{
+ char dst[1], src[1];
+ register char *dstp asm ("x0") = dst;
+ register char *srcp asm ("x1") = src;
+ register long size asm ("x2") = 1;
+
+ /* CPYP [x0]!, [x1]!, x2! */
+ asm volatile(".inst 0x1d010440"
+ : "+r" (dstp), "+r" (srcp), "+r" (size)
+ :
+ : "cc", "memory");
+}
+
static void rng_sigill(void)
{
asm volatile("mrs x0, S3_3_C2_C4_0" : : : "x0");
@@ -210,6 +224,14 @@ static const struct hwcap_data {
.sigill_fn = cssc_sigill,
},
{
+ .name = "MOPS",
+ .at_hwcap = AT_HWCAP2,
+ .hwcap_bit = HWCAP2_MOPS,
+ .cpuinfo = "mops",
+ .sigill_fn = mops_sigill,
+ .sigill_reliable = true,
+ },
+ {
.name = "RNG",
.at_hwcap = AT_HWCAP2,
.hwcap_bit = HWCAP2_RNG,