diff options
| author | Richard Fitzgerald <rf@opensource.cirrus.com> | 2023-01-27 16:51:10 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2023-01-31 12:10:51 +0000 |
| commit | e0bd53a4d1d5afa7d3a3bf46e2f0ec7940f94710 (patch) | |
| tree | 1e0afb0d2e90ff4c26404ed43aa995b1de5d686b | |
| parent | 90f6a2a20bd2e88bd7ea4b4f99509b831c5c1c47 (diff) | |
ASoC: cs42l42: Don't set idle_bias_on
idle_bias_on was set because cs42l42 has a "VMID" type pseudo-midrail
supply (named FILT+), and these typically take a long time to charge.
But the driver never enabled pm_runtime so it would never have powered-
down the cs42l42 anyway.
In fact, FILT+ can charge to operating voltage within 12.5 milliseconds
of enabling HP or ADC. This time is already covered by the startup
delay of the HP/ADC.
The datasheet warning about FILT+ taking up to 1 second to charge only
applies in the special cases that either the PLL is started or
DETECT_MODE set to non-zero while both HP and ADC are off. The driver
never does either of these.
Removing idle_bias_on allows the Soundwire host controller to suspend
if there isn't a snd_soc_jack handler registered.
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20230127165111.3010960-8-sbinding@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | sound/soc/codecs/cs42l42.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c index aa8d724432ab..e3edaa1a2761 100644 --- a/sound/soc/codecs/cs42l42.c +++ b/sound/soc/codecs/cs42l42.c @@ -597,7 +597,6 @@ const struct snd_soc_component_driver cs42l42_soc_component = { .num_dapm_routes = ARRAY_SIZE(cs42l42_audio_map), .controls = cs42l42_snd_controls, .num_controls = ARRAY_SIZE(cs42l42_snd_controls), - .idle_bias_on = 1, .endianness = 1, }; EXPORT_SYMBOL_NS_GPL(cs42l42_soc_component, SND_SOC_CS42L42_CORE); |