diff options
| author | Mikko Perttunen <mperttunen@nvidia.com> | 2022-06-27 17:19:50 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2022-07-08 18:00:13 +0200 |
| commit | e30cf1011b9615d0081b64c896bd9c1506068ab5 (patch) | |
| tree | 23062b59a032782d18b328f8e4e666b4e37f0239 | |
| parent | 28d860ed02c272e2c246c98e66cb013856a1f938 (diff) | |
arm64: tegra: Add Host1x context stream IDs on Tegra186+
Add Host1x context stream IDs on systems that support Host1x context
isolation. Host1x and attached engines can use these stream IDs to
allow isolation between memory used by different processes.
The specified stream IDs must match those configured by the hypervisor,
if one is present.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra186.dtsi | 11 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra194.dtsi | 11 |
2 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index a07acdaf345f..59a10fb184f8 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1484,6 +1484,17 @@ iommus = <&smmu TEGRA186_SID_HOST1X>; + /* Context isolation domains */ + iommu-map = < + 0 &smmu TEGRA186_SID_HOST1X_CTX0 1 + 1 &smmu TEGRA186_SID_HOST1X_CTX1 1 + 2 &smmu TEGRA186_SID_HOST1X_CTX2 1 + 3 &smmu TEGRA186_SID_HOST1X_CTX3 1 + 4 &smmu TEGRA186_SID_HOST1X_CTX4 1 + 5 &smmu TEGRA186_SID_HOST1X_CTX5 1 + 6 &smmu TEGRA186_SID_HOST1X_CTX6 1 + 7 &smmu TEGRA186_SID_HOST1X_CTX7 1>; + dpaux1: dpaux@15040000 { compatible = "nvidia,tegra186-dpaux"; reg = <0x15040000 0x10000>; diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 7ab6cc0a2bb6..d0ed55e5c860 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -1868,6 +1868,17 @@ interconnect-names = "dma-mem"; iommus = <&smmu TEGRA194_SID_HOST1X>; + /* Context isolation domains */ + iommu-map = < + 0 &smmu TEGRA194_SID_HOST1X_CTX0 1 + 1 &smmu TEGRA194_SID_HOST1X_CTX1 1 + 2 &smmu TEGRA194_SID_HOST1X_CTX2 1 + 3 &smmu TEGRA194_SID_HOST1X_CTX3 1 + 4 &smmu TEGRA194_SID_HOST1X_CTX4 1 + 5 &smmu TEGRA194_SID_HOST1X_CTX5 1 + 6 &smmu TEGRA194_SID_HOST1X_CTX6 1 + 7 &smmu TEGRA194_SID_HOST1X_CTX7 1>; + nvdec@15140000 { compatible = "nvidia,tegra194-nvdec"; reg = <0x15140000 0x00040000>; |