diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2021-05-21 11:48:16 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2021-05-21 21:29:07 +0200 |
| commit | e33f8fd9fda9730f5a0f27d1a56c69e1228ed907 (patch) | |
| tree | 736cfaf01474153905049b3003e240fe58380077 | |
| parent | 2b3aa53ebf46031944d0edeab878ab9ba6c415d2 (diff) | |
ARM: dts: Fix up the IXP4xx ethernet nodes
All of IXP4xx SoCs has an EthA at 0xc800c000 so move this
from the IXP[56]x to the IXP4xx DTSI.
Then add the second ethernet port on the Cambria GW2358-4
on EthA.
Reported-by: Zoltan HERPAI <wigyori@uid0.hu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts | 13 | ||||
| -rw-r--r-- | arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi | 11 | ||||
| -rw-r--r-- | arch/arm/boot/dts/intel-ixp4xx.dtsi | 11 |
3 files changed, 24 insertions, 11 deletions
diff --git a/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts b/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts index 581ff18a2310..60a1228a970f 100644 --- a/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts +++ b/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts @@ -153,7 +153,20 @@ phy1: ethernet-phy@1 { reg = <1>; }; + + phy2: ethernet-phy@2 { + reg = <2>; + }; }; }; + + ethernet@c800c000 { + status = "ok"; + queue-rx = <&qmgr 2>; + queue-txready = <&qmgr 19>; + phy-mode = "rgmii"; + phy-handle = <&phy2>; + intel,npe-handle = <&npe 0>; + }; }; }; diff --git a/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi b/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi index ef3696e369b8..cce49e809043 100644 --- a/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi +++ b/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi @@ -31,17 +31,6 @@ status = "disabled"; }; - /* This is known as EthA */ - ethernet@c800c000 { - compatible = "intel,ixp4xx-ethernet"; - reg = <0xc800c000 0x1000>; - status = "disabled"; - intel,npe = <0>; - /* Dummy values that depend on firmware */ - queue-rx = <&qmgr 0>; - queue-txready = <&qmgr 0>; - }; - /* This is known as EthB1 */ ethernet@c800d000 { compatible = "intel,ixp4xx-ethernet"; diff --git a/arch/arm/boot/dts/intel-ixp4xx.dtsi b/arch/arm/boot/dts/intel-ixp4xx.dtsi index 31371c65ad6d..528d5dc09cfc 100644 --- a/arch/arm/boot/dts/intel-ixp4xx.dtsi +++ b/arch/arm/boot/dts/intel-ixp4xx.dtsi @@ -136,5 +136,16 @@ queue-txready = <&qmgr 0>; intel,npe-handle = <&npe 2>; }; + + /* This is known as EthA */ + ethernet@c800c000 { + compatible = "intel,ixp4xx-ethernet"; + reg = <0xc800c000 0x1000>; + status = "disabled"; + intel,npe = <0>; + /* Dummy values that depend on firmware */ + queue-rx = <&qmgr 0>; + queue-txready = <&qmgr 0>; + }; }; }; |