diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-12-09 18:30:41 +0100 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2024-01-03 18:10:40 -0600 |
| commit | eb687212560278a689d80e1140c7d15950989ab2 (patch) | |
| tree | 880d497a758910528a84cf4101ad333a41889173 | |
| parent | 5c7c75b9cd261fc6f86ff0dd12fb213336003c26 (diff) | |
arm64: dts: socfpga: agilex: move FPGA region out of soc node
The "soc" node is supposed to have only MMIO children, so move the FPGA
region node to top level to fix dtc W=1 warnings like:
socfpga_agilex.dtsi:141.20-146.5: Warning (simple_bus_reg): /soc@0/base_fpga_region: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index de1453a951d6..77d03caea25b 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -60,6 +60,13 @@ }; }; + fpga-region { + compatible = "fpga-region"; + #address-cells = <0x2>; + #size-cells = <0x2>; + fpga-mgr = <&fpga_mgr>; + }; + pmu { compatible = "arm,armv8-pmuv3"; interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>, @@ -138,13 +145,6 @@ interrupt-parent = <&intc>; ranges = <0 0 0 0xffffffff>; - base_fpga_region { - #address-cells = <0x2>; - #size-cells = <0x2>; - compatible = "fpga-region"; - fpga-mgr = <&fpga_mgr>; - }; - clkmgr: clock-controller@ffd10000 { compatible = "intel,agilex-clkmgr"; reg = <0xffd10000 0x1000>; |