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authorBen Skeggs <bskeggs@redhat.com>2022-06-01 20:46:55 +1000
committerBen Skeggs <bskeggs@redhat.com>2022-11-09 10:44:36 +1000
commitebb195dbb3390324100cb85c22129f6334064b5f (patch)
treec2a0c9fbf578c5fdf114f3e71cbd1f78343f3176
parentfe76fe497c30080ce8962ea62c5c13c6814e1a83 (diff)
drm/nouveau/mc: move NV_PMC_ENABLE bashing to chipset-specific code
Ampere needs different handling here, most of what we touch has moved. We probably want to refactor these interfaces in general, but I'm not yet sure how they should look, this will get the job done for now. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c17
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/g98.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c29
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h8
16 files changed, 56 insertions, 11 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c
index 322237e2ff80..c85600ba69f9 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c
@@ -73,9 +73,8 @@ nvkm_mc_reset(struct nvkm_device *device, enum nvkm_subdev_type type, int inst)
{
u64 pmc_enable = nvkm_mc_reset_mask(device, true, type, inst);
if (pmc_enable) {
- nvkm_mask(device, 0x000200, pmc_enable, 0x00000000);
- nvkm_mask(device, 0x000200, pmc_enable, pmc_enable);
- nvkm_rd32(device, 0x000200);
+ device->mc->func->device->disable(device->mc, pmc_enable);
+ device->mc->func->device->enable(device->mc, pmc_enable);
}
}
@@ -84,17 +83,15 @@ nvkm_mc_disable(struct nvkm_device *device, enum nvkm_subdev_type type, int inst
{
u64 pmc_enable = nvkm_mc_reset_mask(device, false, type, inst);
if (pmc_enable)
- nvkm_mask(device, 0x000200, pmc_enable, 0x00000000);
+ device->mc->func->device->disable(device->mc, pmc_enable);
}
void
nvkm_mc_enable(struct nvkm_device *device, enum nvkm_subdev_type type, int inst)
{
u64 pmc_enable = nvkm_mc_reset_mask(device, false, type, inst);
- if (pmc_enable) {
- nvkm_mask(device, 0x000200, pmc_enable, pmc_enable);
- nvkm_rd32(device, 0x000200);
- }
+ if (pmc_enable)
+ device->mc->func->device->enable(device->mc, pmc_enable);
}
bool
@@ -102,11 +99,9 @@ nvkm_mc_enabled(struct nvkm_device *device, enum nvkm_subdev_type type, int inst
{
u64 pmc_enable = nvkm_mc_reset_mask(device, false, type, inst);
- return (pmc_enable != 0) &&
- ((nvkm_rd32(device, 0x000200) & pmc_enable) == pmc_enable);
+ return (pmc_enable != 0) && device->mc->func->device->enabled(device->mc, pmc_enable);
}
-
static int
nvkm_mc_init(struct nvkm_subdev *subdev)
{
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c
index 8a8267ecfe1d..9feb7d167d23 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c
@@ -56,6 +56,7 @@ g84_mc = {
.init = nv50_mc_init,
.intr = &nv04_mc_intr,
.intrs = g84_mc_intrs,
+ .device = &nv04_mc_device,
.reset = g84_mc_reset,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/g98.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/g98.c
index e099d419f1ce..b0b328044e55 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/g98.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/g98.c
@@ -56,6 +56,7 @@ g98_mc = {
.init = nv50_mc_init,
.intr = &nv04_mc_intr,
.intrs = g98_mc_intrs,
+ .device = &nv04_mc_device,
.reset = g98_mc_reset,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.c
index 98ccce9585eb..842326a24393 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.c
@@ -24,6 +24,7 @@
static const struct nvkm_mc_func
ga100_mc = {
.init = nv50_mc_init,
+ .device = &nv04_mc_device,
.reset = gk104_mc_reset,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
index b2846eaea34c..d5dba44235cf 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
@@ -71,6 +71,7 @@ gf100_mc = {
.intrs = gf100_mc_intrs,
.intr_nonstall = true,
.reset = gf100_mc_reset,
+ .device = &nv04_mc_device,
.unk260 = gf100_mc_unk260,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c
index edf82e4568bf..023dfda735cd 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c
@@ -54,6 +54,7 @@ gk104_mc = {
.intrs = gk104_mc_intrs,
.intr_nonstall = true,
.reset = gk104_mc_reset,
+ .device = &nv04_mc_device,
.unk260 = gf100_mc_unk260,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c
index 931985343ab5..d98a6563a411 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c
@@ -29,6 +29,7 @@ gk20a_mc = {
.intr = &gt215_mc_intr,
.intrs = gk104_mc_intrs,
.intr_nonstall = true,
+ .device = &nv04_mc_device,
.reset = gk104_mc_reset,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c
index 5dfdf75af255..bffde40bb237 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c
@@ -90,6 +90,7 @@ gp100_mc = {
.intr = &gp100_mc_intr,
.intrs = gp100_mc_intrs,
.intr_nonstall = true,
+ .device = &nv04_mc_device,
.reset = gk104_mc_reset,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.c
index 6b83c6bf308c..9bed9c5ea5d3 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.c
@@ -37,6 +37,7 @@ gp10b_mc = {
.intr = &gp100_mc_intr,
.intrs = gp100_mc_intrs,
.intr_nonstall = true,
+ .device = &nv04_mc_device,
.reset = gk104_mc_reset,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c
index 330ef92f5e50..41e17a470388 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c
@@ -83,6 +83,7 @@ gt215_mc = {
.init = nv50_mc_init,
.intr = &nv04_mc_intr,
.intrs = gt215_mc_intrs,
+ .device = &nv04_mc_device,
.reset = gt215_mc_reset,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
index 00adf6833d26..04809caf36d6 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
@@ -30,6 +30,34 @@ nv04_mc_reset[] = {
{}
};
+static void
+nv04_mc_device_disable(struct nvkm_mc *mc, u32 mask)
+{
+ nvkm_mask(mc->subdev.device, 0x000200, mask, 0x00000000);
+}
+
+static void
+nv04_mc_device_enable(struct nvkm_mc *mc, u32 mask)
+{
+ struct nvkm_device *device = mc->subdev.device;
+
+ nvkm_mask(device, 0x000200, mask, mask);
+ nvkm_rd32(device, 0x000200);
+}
+
+static bool
+nv04_mc_device_enabled(struct nvkm_mc *mc, u32 mask)
+{
+ return (nvkm_rd32(mc->subdev.device, 0x000200) & mask) == mask;
+}
+
+const struct nvkm_mc_device_func
+nv04_mc_device = {
+ .enabled = nv04_mc_device_enabled,
+ .enable = nv04_mc_device_enable,
+ .disable = nv04_mc_device_disable,
+};
+
static const struct nvkm_intr_data
nv04_mc_intrs[] = {
{ NVKM_ENGINE_DISP , 0, 0, 0x01010000, true },
@@ -98,6 +126,7 @@ nv04_mc = {
.init = nv04_mc_init,
.intr = &nv04_mc_intr,
.intrs = nv04_mc_intrs,
+ .device = &nv04_mc_device,
.reset = nv04_mc_reset,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.c
index 1cef78827f57..6a3e2f4753ef 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.c
@@ -38,6 +38,7 @@ nv11_mc = {
.init = nv04_mc_init,
.intr = &nv04_mc_intr,
.intrs = nv11_mc_intrs,
+ .device = &nv04_mc_device,
.reset = nv04_mc_reset,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.c
index ac70c359bce0..2edc1cb0e379 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.c
@@ -47,6 +47,7 @@ nv17_mc = {
.init = nv04_mc_init,
.intr = &nv04_mc_intr,
.intrs = nv17_mc_intrs,
+ .device = &nv04_mc_device,
.reset = nv17_mc_reset,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c
index 0a054459a949..649a9fcc0a2f 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c
@@ -42,6 +42,7 @@ nv44_mc = {
.init = nv44_mc_init,
.intr = &nv04_mc_intr,
.intrs = nv17_mc_intrs,
+ .device = &nv04_mc_device,
.reset = nv17_mc_reset,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c
index 6a02ed754c3f..a42d20206e37 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c
@@ -49,6 +49,7 @@ nv50_mc = {
.init = nv50_mc_init,
.intr = &nv04_mc_intr,
.intrs = nv50_mc_intrs,
+ .device = &nv04_mc_device,
.reset = nv17_mc_reset,
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
index 3ecfe9b4fb05..7f38d54b4bc2 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
@@ -21,7 +21,14 @@ struct nvkm_mc_func {
const struct nvkm_intr_data *intrs;
bool intr_nonstall;
+ const struct nvkm_mc_device_func {
+ bool (*enabled)(struct nvkm_mc *, u32 mask);
+ void (*enable)(struct nvkm_mc *, u32 mask);
+ void (*disable)(struct nvkm_mc *, u32 mask);
+ } *device;
+
const struct nvkm_mc_map *reset;
+
void (*unk260)(struct nvkm_mc *, u32);
};
@@ -30,6 +37,7 @@ extern const struct nvkm_intr_func nv04_mc_intr;
bool nv04_mc_intr_pending(struct nvkm_intr *);
void nv04_mc_intr_unarm(struct nvkm_intr *);
void nv04_mc_intr_rearm(struct nvkm_intr *);
+extern const struct nvkm_mc_device_func nv04_mc_device;
extern const struct nvkm_mc_map nv04_mc_reset[];
extern const struct nvkm_intr_data nv17_mc_intrs[];