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authorFlorian Fainelli <f.fainelli@gmail.com>2016-04-04 10:55:37 -0700
committerRalf Baechle <ralf@linux-mips.org>2016-05-13 14:02:07 +0200
commitf337967d6d87da39f6e59d90430f3bec0909edf5 (patch)
tree230d526c9f005dd22bfafddd09420108ef1aa7a9
parentf675843ddfdfdf467d08cc922201614a149e439e (diff)
MIPS: BMIPS: Add cpu-feature-overrides.h
BMIPS_GENERIC being multiplatform and intended to support BMIPS3200, BMIPS3300, BMIPS4350, BMIPS4380 and BMIPS5000-class processors, there is not much more we can put in there since they do not share the same I and D cache line sizes at all (doubled for every new generation essentially), some processors have a S-cache, some don't, some have a FPU, some don't. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13013/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/mach-bmips/cpu-feature-overrides.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-bmips/cpu-feature-overrides.h b/arch/mips/include/asm/mach-bmips/cpu-feature-overrides.h
new file mode 100644
index 000000000000..fa0583e1ce0d
--- /dev/null
+++ b/arch/mips/include/asm/mach-bmips/cpu-feature-overrides.h
@@ -0,0 +1,14 @@
+#ifndef __ASM_MACH_BMIPS_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_BMIPS_CPU_FEATURE_OVERRIDES_H
+
+/* Invariants across all BMIPS processors */
+#define cpu_has_vtag_icache 0
+#define cpu_icache_snoops_remote_store 1
+
+/* Processor ISA compatibility is MIPS32R1 */
+#define cpu_has_mips32r1 1
+#define cpu_has_mips32r2 0
+#define cpu_has_mips64r1 0
+#define cpu_has_mips64r2 0
+
+#endif /* __ASM_MACH_BMIPS_CPU_FEATURE_OVERRIDES_H */