diff options
| author | Changbin Du <changbin.du@intel.com> | 2017-10-30 14:19:15 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2017-11-16 11:48:33 +0800 |
| commit | ffe2a503b06cc300e25c1dfc00c85a2240cf97d7 (patch) | |
| tree | 6340bbb50c4a8ad0e737070a8a8265968c7d8b4f | |
| parent | 0bde438b7e2200fc961625ac7b828cbc8c6d78e1 (diff) | |
drm/i915/gvt: Reduce rcs mocs switch latency
Use I915_WRITE_FW instead of I915_WRITE to reduce overhead.
The overall mmio switch latency lowers from ~600us to ~180us.
Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/render.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c index e16c3551b4a3..0672178548ef 100644 --- a/drivers/gpu/drm/i915/gvt/render.c +++ b/drivers/gpu/drm/i915/gvt/render.c @@ -209,7 +209,7 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id) offset.reg = regs[ring_id]; for (i = 0; i < 64; i++) { gen9_render_mocs[ring_id][i] = I915_READ_FW(offset); - I915_WRITE(offset, vgpu_vreg(vgpu, offset)); + I915_WRITE_FW(offset, vgpu_vreg(vgpu, offset)); offset.reg += 4; } |