summaryrefslogtreecommitdiff
path: root/Documentation/arm/firmware.txt
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2016-02-18 17:20:25 +0100
committerGregory CLEMENT <gregory.clement@free-electrons.com>2016-02-19 14:04:54 +0100
commit2859f70a0ce74df5bba7d6145a99ff54ac0e3a53 (patch)
tree91d2579d4f8856a8b215199a04b00c2e6756bc48 /Documentation/arm/firmware.txt
parente772ca05cceb1480bdc7a7579e042b18558d0959 (diff)
Documentation: arm: update Marvell product listing
I'm still getting confused regarding which core specifically is used in which SoC, so I've added some more detail to the Marvell README file. I got most of this from random sources on the internet, so it's possible that some of the information is wrong, but most of it should be pretty obvious. There are a few remaining points I could not find out: * The CPU core in Orion 88F6183 * The difference (if any) between PJ4B-MP and PJ4C * The naming of Feroceon/Jolteon/Flareon/Sheeva/Mohawk/PJ1/PJ4 is still confusing, as they tend to overlap. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [Thomas: - move Armada SP out from the EBU family into its own "Storage" family. This chip is indeed not part of the EBU family. - fixed the URL for the Armada SP information, since the link of the original patch no longer existed - explicitly indicate that there is no support in upstream for the Armada SP - indent the "Core: " description for the Armada XP to be clearly under the Armada XP category, so that it is clear it applies to Armada XP only, and not other cores of the EBU family.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'Documentation/arm/firmware.txt')
0 files changed, 0 insertions, 0 deletions