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author | Atish Patra <atish.patra@wdc.com> | 2022-02-18 16:46:57 -0800 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-03-21 14:58:33 -0700 |
commit | e9991434596f5373dfd75857b445eb92a9253c56 (patch) | |
tree | b39e3c364207841faf568f86332c8a087b8fe622 /Documentation/bpf/libbpf | |
parent | 90beae5185c260074db409241247630036cf93a0 (diff) |
RISC-V: Add perf platform driver based on SBI PMU extension
RISC-V SBI specification added a PMU extension that allows to configure
start/stop any pmu counter. The RISC-V perf can use most of the generic
perf features except interrupt overflow and event filtering based on
privilege mode which will be added in future.
It also allows to monitor a handful of firmware counters that can provide
insights into firmware activity during a performance analysis.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'Documentation/bpf/libbpf')
0 files changed, 0 insertions, 0 deletions