diff options
author | Maxime Ripard <maxime@cerno.tech> | 2021-09-01 11:18:06 +0200 |
---|---|---|
committer | Rob Herring <robh@kernel.org> | 2021-09-13 08:20:18 -0500 |
commit | ddf6cc9a729567114341da7220c5efb5fbcc2339 (patch) | |
tree | 7cb1f44b5581d8ef1f66f70e5b2e2fa43d3f010c /Documentation/devicetree/bindings/arm/cci-control-port.yaml | |
parent | bf99826f239edf9e9471a25a62e3ed00a0f28c8c (diff) |
dt-bindings: arm: Convert ARM CCI-400 binding to a schema
The ARM CCI-400 Interconnect is supported by Linux thanks to its device
tree binding.
Now that we have the DT validation in place, let's convert the device
tree bindings for that driver over to a YAML schema.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210901091852.479202-7-maxime@cerno.tech
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/cci-control-port.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/arm/cci-control-port.yaml | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/cci-control-port.yaml b/Documentation/devicetree/bindings/arm/cci-control-port.yaml new file mode 100644 index 000000000000..c9114866213f --- /dev/null +++ b/Documentation/devicetree/bindings/arm/cci-control-port.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/cci-control-port.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CCI Interconnect Bus Masters binding + +maintainers: + - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> + +description: | + Masters in the device tree connected to a CCI port (inclusive of CPUs + and their cpu nodes). + +select: true + +properties: + cci-control-port: + $ref: /schemas/types.yaml#/definitions/phandle + +additionalProperties: true + +examples: + - | + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + cci-control-port = <&cci_control1>; + reg = <0>; + }; + }; + +... |