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authorChanwoo Choi <cw00.choi@samsung.com>2015-02-03 09:13:54 +0900
committerSylwester Nawrocki <s.nawrocki@samsung.com>2015-02-05 19:31:06 +0100
commit8e46c4b84faf317773d5a4ec6d807ceae2d0eb41 (patch)
treecdb7af210fdb36a90034e3b48f8dc1629d2e1ecf /Documentation/devicetree/bindings/clock/exynos5433-clock.txt
parent45e58aa5f751fd861d46f7b6d438c1be147458c6 (diff)
clk: samsung: exynos5433: Add clocks for CMU_ISP domain
This patch adds the mux/divider/gate clocks for CMU_ISP domain which generates the clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/exynos5433-clock.txt')
-rw-r--r--Documentation/devicetree/bindings/clock/exynos5433-clock.txt20
1 files changed, 20 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
index acc1d8aac95c..4f3bfcd366a3 100644
--- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt
@@ -43,6 +43,8 @@ Required Properties:
which generates clocks for MFC(Multi-Format Codec) IP.
- "samsung,exynos5433-cmu-hevc" - clock controller compatible for CMU_HEVC
which generates clocks for HEVC(High Efficiency Video Codec) decoder IP.
+ - "samsung,exynos5433-cmu-isp" - clock controller compatible for CMU_ISP
+ which generates clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
- reg: physical base address of the controller and length of memory mapped
region.
@@ -137,6 +139,11 @@ Required Properties:
- oscclk
- aclk_hevc_400
+ Input clocks for isp clock controller:
+ - oscclk
+ - aclk_isp_dis_400
+ - aclk_isp_400
+
Each clock is assigned an identifier and client nodes can use this identifier
to specify the clock which they consume.
@@ -370,6 +377,19 @@ Example 2: Examples of clock controller nodes are listed below.
clocks = <&xxti>, <&cmu_top CLK_ACLK_HEVC_400>;
};
+ cmu_isp: clock-controller@146d0000 {
+ compatible = "samsung,exynos5433-cmu-isp";
+ reg = <0x146d0000 0x0b0c>;
+ #clock-cells = <1>;
+
+ clock-names = "oscclk",
+ "aclk_isp_dis_400",
+ "aclk_isp_400";
+ clocks = <&xxti>,
+ <&cmu_top CLK_ACLK_ISP_DIS_400>,
+ <&cmu_top CLK_ACLK_ISP_400>;
+ };
+
Example 3: UART controller node that consumes the clock generated by the clock
controller.