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authorArnd Bergmann <arnd@arndb.de>2023-12-22 11:19:18 +0000
committerArnd Bergmann <arnd@arndb.de>2023-12-22 11:19:20 +0000
commitec5b7be617156d0144fbbb2558c03c7418a2e693 (patch)
tree4192feafb0f58c662c8082e778e18e87ccbb4eb8 /Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
parent8eb0b1ed65402fc71c8a419e8a7f1368420e9b95 (diff)
parent35f32e39b4d9b436354c2a37623c393a2ac7cf87 (diff)
Merge tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers
Samsung SoC driver changes for v6.8 1. Add support for Google GS101 SoC to different drivers: clock controller, serial and watchdog. The clock driver changes depend on few bindings headers, which I put in a topic branch with the bindings refactoring and GS101 support, therefore this this pull request includes that bindings topic branch. The rest of the bindings topic branch is not necessary here, however keeping everything together makes it easier to share between branches. The bindings topic branch is mostly refactoring all the compatibles to add SoC-specific compatible followed by fallback. 2. Exynos ChipID: recognize ExynosAutov920. * tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (40 commits) dt-bindings: clock: google,gs101: rename CMU_TOP gate defines watchdog: s3c2410_wdt: Add support for Google gs101 SoC watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro watchdog: s3c2410_wdt: Add support for WTCON register DBGACK_MASK bit tty: serial: samsung: Add gs101 compatible and common fifoszdt_serial_drv_data clk: samsung: clk-gs101: Add cmu_top, cmu_misc and cmu_apm support clk: samsung: clk-pll: Add support for pll_{0516,0517,518} dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix dt-bindings: soc: samsung: usi: add google,gs101-usi compatible dt-bindings: serial: samsung: Make samsung,uart-fifosize a required property dt-bindings: serial: samsung: Add google-gs101-uart compatible dt-bindings: watchdog: Document Google gs101 watchdog bindings dt-bindings: samsung: exynos-sysreg: combine exynosautov920 with other enum dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101 dt-bindings: clock: Add Google gs101 clock management unit bindings dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible dt-bindings: watchdog: samsung: add specific compatible for Tesla FSD dt-bindings: samsung: exynos-pmu: add specific compatible for Tesla FSD dt-bindings: serial: samsung: add specific compatible for Tesla FSD dt-bindings: pwm: samsung: add specific compatible for Tesla FSD ... Link: https://lore.kernel.org/r/20231220084722.22149-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/google,gs101-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Google GS101 SoC clock controller
+
+maintainers:
+ - Peter Griffin <peter.griffin@linaro.org>
+
+description: |
+ Google GS101 clock controller is comprised of several CMU units, generating
+ clocks for different domains. Those CMU units are modeled as separate device
+ tree nodes, and might depend on each other. The root clock in that clock tree
+ is OSCCLK (24.576 MHz). That external clock must be defined as a fixed-rate
+ clock in dts.
+
+ CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
+ dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
+
+ Each clock is assigned an identifier and client nodes can use this identifier
+ to specify the clock which they consume. All clocks available for usage
+ in clock consumer nodes are defined as preprocessor macros in
+ 'dt-bindings/clock/gs101.h' header.
+
+properties:
+ compatible:
+ enum:
+ - google,gs101-cmu-top
+ - google,gs101-cmu-apm
+ - google,gs101-cmu-misc
+
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ maxItems: 2
+
+ "#clock-cells":
+ const: 1
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - "#clock-cells"
+ - clocks
+ - clock-names
+ - reg
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - google,gs101-cmu-top
+ - google,gs101-cmu-apm
+ then:
+ properties:
+ clocks:
+ items:
+ - description: External reference clock (24.576 MHz)
+
+ clock-names:
+ items:
+ - const: oscclk
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: google,gs101-cmu-misc
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Misc bus clock (from CMU_TOP)
+ - description: Misc sss clock (from CMU_TOP)
+
+ clock-names:
+ items:
+ - const: dout_cmu_misc_bus
+ - const: dout_cmu_misc_sss
+
+additionalProperties: false
+
+examples:
+ # Clock controller node for CMU_TOP
+ - |
+ #include <dt-bindings/clock/google,gs101.h>
+
+ cmu_top: clock-controller@1e080000 {
+ compatible = "google,gs101-cmu-top";
+ reg = <0x1e080000 0x8000>;
+ #clock-cells = <1>;
+ clocks = <&ext_24_5m>;
+ clock-names = "oscclk";
+ };
+
+...