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authorAlexander Shiyan <shc_work@mail.ru>2013-11-08 13:00:22 +0400
committerShawn Guo <shawn.guo@linaro.org>2013-12-09 13:18:30 +0800
commit9b015e5a95c54171b72b83e7d4ffb60489d867b4 (patch)
tree9dcc7f63ee7436a6ccbb21e3c6dbf00ee5a0ec51 /Documentation/devicetree/bindings/clock/imx5-clock.txt
parent5bcaa7a32cd90f7e6fbbbfcbc65b5cdbf12cb8a3 (diff)
ARM: i.MX5x: Add SAHARA clock for i.MX5x CPUs
Patch adds missing Security Accelerator (SAHARA) clock for i.MX5x CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/imx5-clock.txt')
-rw-r--r--Documentation/devicetree/bindings/clock/imx5-clock.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx5-clock.txt b/Documentation/devicetree/bindings/clock/imx5-clock.txt
index 4c029a8739d3..3716b36c1440 100644
--- a/Documentation/devicetree/bindings/clock/imx5-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx5-clock.txt
@@ -198,6 +198,7 @@ clocks and IDs.
spdif1_gate 184
spdif_ipg_gate 185
ocram 186
+ sahara_ipg_gate 187
Examples (for mx53):