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authorLinus Torvalds <torvalds@linux-foundation.org>2019-12-02 11:00:19 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2019-12-02 11:00:19 -0800
commita5255bc31673c72e264d837cd13cd3085d72cb58 (patch)
tree85a9c76768a54e0c698341882cca1563ef9a4a60 /Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
parent596cf45cbf6e4fa7bcb0df33e373a7d062b644b5 (diff)
parent67805a4b3c924927d9e064bca235461941f89e4a (diff)
Merge tag 'dmaengine-5.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul: "Here are the changes this time around, couple of new drivers and updates to few more: - New drivers for SiFive PDMA, Socionext Milbeaut HDMAC and XDMAC, Freescale dpaa2 qDMA - Support for X1000 in JZ4780 - Xilinx dma updates and support for Xilinx AXI MCDM controller - New bindings for rcar R8A774B1 - Minor updates to dw, dma-jz4780, ti-edma, sprd drivers" * tag 'dmaengine-5.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (61 commits) dmaengine: Fix Kconfig indentation dmaengine: sf-pdma: move macro to header file dmaengine: sf-pdma: replace /** with /* for non-function comment dmaengine: ti: edma: fix missed failure handling dmaengine: mmp_pdma: add missed of_dma_controller_free dmaengine: mmp_tdma: add missed of_dma_controller_free dmaengine: sprd: Add wrap address support for link-list mode MAINTAINERS: Add Green as SiFive PDMA driver maintainer dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00 dt-bindings: dmaengine: sf-pdma: add bindins for SiFive PDMA dmaengine: zx: remove: removed dmam_pool_destroy dmaengine: mediatek: hsdma_probe: fixed a memory leak when devm_request_irq fails dmaengine: iop-adma: clean up an indentation issue dmaengine: milbeaut-xdmac: remove redundant error log dmaengine: milbeaut-hdmac: remove redundant error log dmaengine: dma-jz4780: add missed clk_disable_unprepare in remove dmaengine: JZ4780: Add support for the X1000. dt-bindings: dmaengine: Add X1000 bindings. dmaengine: xilinx_dma: Add Xilinx AXI MCDMA Engine driver support dmaengine: xilinx_dma: Extend dma_config struct to store irq routine handle ...
Diffstat (limited to 'Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt')
-rw-r--r--Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt24
1 files changed, 15 insertions, 9 deletions
diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
index 93b6d961dd4f..325aca52cd43 100644
--- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
+++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
@@ -11,9 +11,16 @@ is to receive from the device.
Xilinx AXI CDMA engine, it does transfers between memory-mapped source
address and a memory-mapped destination address.
+Xilinx AXI MCDMA engine, it does transfer between memory and AXI4 stream
+target devices. It can be configured to have up to 16 independent transmit
+and receive channels.
+
Required properties:
-- compatible: Should be "xlnx,axi-vdma-1.00.a" or "xlnx,axi-dma-1.00.a" or
- "xlnx,axi-cdma-1.00.a""
+- compatible: Should be one of-
+ "xlnx,axi-vdma-1.00.a"
+ "xlnx,axi-dma-1.00.a"
+ "xlnx,axi-cdma-1.00.a"
+ "xlnx,axi-mcdma-1.00.a"
- #dma-cells: Should be <1>, see "dmas" property below
- reg: Should contain VDMA registers location and length.
- xlnx,addrwidth: Should be the vdma addressing size in bits(ex: 32 bits).
@@ -29,7 +36,7 @@ Required properties:
"m_axis_mm2s_aclk", "s_axis_s2mm_aclk"
For CDMA:
Required elements: "s_axi_lite_aclk", "m_axi_aclk"
- FOR AXIDMA:
+ For AXIDMA and MCDMA:
Required elements: "s_axi_lite_aclk"
Optional elements: "m_axi_mm2s_aclk", "m_axi_s2mm_aclk",
"m_axi_sg_aclk"
@@ -37,12 +44,11 @@ Required properties:
Required properties for VDMA:
- xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
-Optional properties for AXI DMA:
+Optional properties for AXI DMA and MCDMA:
- xlnx,sg-length-width: Should be set to the width in bits of the length
register as configured in h/w. Takes values {8...26}. If the property
is missing or invalid then the default value 23 is used. This is the
maximum value that is supported by all IP versions.
-- xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware.
Optional properties for VDMA:
- xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
It takes following values:
@@ -55,8 +61,8 @@ Required child node properties:
For VDMA: It should be either "xlnx,axi-vdma-mm2s-channel" or
"xlnx,axi-vdma-s2mm-channel".
For CDMA: It should be "xlnx,axi-cdma-channel".
- For AXIDMA: It should be either "xlnx,axi-dma-mm2s-channel" or
- "xlnx,axi-dma-s2mm-channel".
+ For AXIDMA and MCDMA: It should be either "xlnx,axi-dma-mm2s-channel"
+ or "xlnx,axi-dma-s2mm-channel".
- interrupts: Should contain per channel VDMA interrupts.
- xlnx,datawidth: Should contain the stream data width, take values
{32,64...1024}.
@@ -69,8 +75,8 @@ Optional child node properties for VDMA:
enabled/disabled in hardware.
- xlnx,enable-vert-flip: Tells vertical flip is
enabled/disabled in hardware(S2MM path).
-Optional child node properties for AXI DMA:
--dma-channels: Number of dma channels in child node.
+Optional child node properties for MCDMA:
+- dma-channels: Number of dma channels in child node.
Example:
++++++++