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authorRahul Tanwar <rtanwar@maxlinear.com>2022-11-24 16:41:40 +0800
committerThomas Gleixner <tglx@linutronix.de>2022-12-02 14:57:13 +0100
commit2b822f474621bb2f4f21dd6dae6900e2ccca7e95 (patch)
treef33fc677122c1fe039e3293d5fc4800d6958fc5b /Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.txt
parent9b09927c0cdec4d4e75f7f9e621eaec179a888fd (diff)
dt-bindings: x86: apic: Convert Intel's APIC bindings to YAML schema
The DT bindings for X86 local APIC (lapic) and I/O APIC (ioapic) are outdated. Rework them: - Convert the bindings for lapic and ioapic from text to YAML schema. - Separate lapic & ioapic schemas. - Add missing but required standard properties - Add missing descriptions Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221124084143.21841-2-rtanwar@maxlinear.com
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diff --git a/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.txt b/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.txt
deleted file mode 100644
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--- a/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.txt
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-Interrupt chips
----------------
-
-* Intel I/O Advanced Programmable Interrupt Controller (IO APIC)
-
- Required properties:
- --------------------
- compatible = "intel,ce4100-ioapic";
- #interrupt-cells = <2>;
-
- Device's interrupt property:
-
- interrupts = <P S>;
-
- The first number (P) represents the interrupt pin which is wired to the
- IO APIC. The second number (S) represents the sense of interrupt which
- should be configured and can be one of:
- 0 - Edge Rising
- 1 - Level Low
- 2 - Level High
- 3 - Edge Falling
-
-* Local APIC
- Required property:
-
- compatible = "intel,ce4100-lapic";