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authorRahul Tanwar <rtanwar@maxlinear.com>2022-11-24 16:41:41 +0800
committerThomas Gleixner <tglx@linutronix.de>2022-12-02 14:57:14 +0100
commitb3a9801cccefda304263b4e84e9dfe49057f3c29 (patch)
tree3d59f4ba79ad1552ed754b5ed5257bc554bff9a6 /Documentation/devicetree/bindings/interrupt-controller
parent2b822f474621bb2f4f21dd6dae6900e2ccca7e95 (diff)
dt-bindings: x86: apic: Introduce new optional bool property for lapic
X86 defines a few possible interrupt delivery modes. With respect to boot/init time, mainly two interrupt delivery modes are possible. - PIC Mode: Legacy external 8259 compliant PIC interrupt controller - Virtual Wire Mode: Use lapic as virtual wire interrupt delivery mode ACPI and MPS spec compliant systems provide this information, but for OF based systems, it is by default set to PIC mode. In fact it is hardcoded to legacy PIC mode for OF based x86 systems with no option to choose the configuration between PIC mode & virtual wire mode. For this purpose, introduce a new boolean property for the lapic interrupt controller node which allows to configure it for virtual wire mode as well. Property name: 'intel,virtual-wire-mode' Type: Boolean If not present/not defined, interrupt delivery mode defaults to legacy PIC mode. If present/defined, interrupt delivery mode is set to virtual wire mode. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221124084143.21841-3-rtanwar@maxlinear.com
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller')
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml14
1 files changed, 14 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml b/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml
index 55184cb49432..d2d0145cb889 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml
@@ -39,6 +39,19 @@ properties:
'#interrupt-cells':
const: 2
+ intel,virtual-wire-mode:
+ description: Intel defines a few possible interrupt delivery
+ modes. With respect to boot/init time, mainly two interrupt
+ delivery modes are possible.
+ PIC Mode - Legacy external 8259 compliant PIC interrupt controller.
+ Virtual Wire Mode - use lapic as virtual wire interrupt delivery mode.
+ For ACPI or MPS spec compliant systems, it is figured out by some read
+ only bit field/s available in their respective defined data structures.
+ For OF based systems, it is by default set to PIC mode.
+ But if this optional boolean property is set, then the interrupt delivery
+ mode is configured to virtual wire compatibility mode.
+ type: boolean
+
required:
- compatible
- reg
@@ -54,4 +67,5 @@ examples:
reg = <0xfee00000 0x1000>;
interrupt-controller;
#interrupt-cells = <2>;
+ intel,virtual-wire-mode;
};