diff options
| author | Xianwei Zhao <xianwei.zhao@amlogic.com> | 2025-03-11 11:08:28 +0800 |
|---|---|---|
| committer | Neil Armstrong <neil.armstrong@linaro.org> | 2025-03-17 08:38:24 +0100 |
| commit | bbd6fcc76b39502767e213ad24a349205cf75e96 (patch) | |
| tree | c279e22bdd3b50cde82aca86e889a5e28ffdad70 /Documentation/devicetree/bindings/interrupt-controller | |
| parent | 40f4152442f72748ce883ca53ca80961e433701c (diff) | |
irqchip: Add support for Amlogic A4 and A5 SoCs
The Amlogic A4 SoCs support 12 GPIO IRQ lines and 2 AO GPIO IRQ lines,
A5 SoCs support 12 GPIO IRQ lines, details are as below.
A4 IRQ Number:
- 72:55 18 pins on bank T
- 54:32 23 pins on bank X
- 31:16 16 pins on bank D
- 15:14 2 pins on bank E
- 13:0 14 pins on bank B
A4 AO IRQ Number:
- 7 1 pin on bank TESTN
- 6:0 7 pins on bank AO
A5 IRQ Number:
- 98 1 pin on bank TESTN
- 97:82 16 pins on bank Z
- 81:62 20 pins on bank X
- 61:48 14 pins on bank T
- 47:32 16 pins on bank D
- 31:27 5 pins on bank H
- 26:25 2 pins on bank E
- 24:14 11 pins on bank C
- 13:0 14 pins on bank B
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20250311-irqchip-gpio-a4-a5-v5-2-ca4cc276c18c@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller')
0 files changed, 0 insertions, 0 deletions