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authorNeil Armstrong <neil.armstrong@linaro.org>2024-11-28 16:16:45 +0100
committerUlf Hansson <ulf.hansson@linaro.org>2024-12-10 15:52:26 +0100
commitea049a037e9e01e4dd92e44c21f8d594e64e4396 (patch)
tree17021ac1df8cc8970193f8082406e4bcf25cd887 /Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdio.yaml
parentb833f3deb1abdccc171e6a7ad6aa2f3f66e4f7f7 (diff)
dt-bindings: mmc: convert amlogic,meson-mx-sdio.txt to dtschema
Convert the Amlogic Meson6, Meson8 and Meson8b SDIO/MMC controller bindings to dt-schema. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Message-ID: <20241128-topic-amlogic-arm32-upstream-bindings-fixes-convert-meson-mx-sdio-v4-5-11d9f9200a59@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic Meson6, Meson8 and Meson8b SDIO/MMC controller
+
+description: |
+ The highspeed MMC host controller on Amlogic SoCs provides an interface
+ for MMC, SD, SDIO and SDHC types of memory cards.
+
+ Supported maximum speeds are the ones of the eMMC standard 4.41 as well
+ as the speed of SD standard 2.0.
+
+ The hardware provides an internal "mux" which allows up to three slots
+ to be controlled. Only one slot can be accessed at a time.
+
+maintainers:
+ - Neil Armstrong <neil.armstrong@linaro.org>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - amlogic,meson8-sdio
+ - amlogic,meson8b-sdio
+ - const: amlogic,meson-mx-sdio
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: core
+ - const: clkin
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+patternProperties:
+ "slot@[0-2]$":
+ $ref: mmc-slot.yaml#
+ description:
+ A node for each slot provided by the MMC controller
+
+ properties:
+ reg:
+ enum: [0, 1, 2]
+
+ bus-width:
+ enum: [1, 4]
+
+ unevaluatedProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ mmc@c1108c20 {
+ compatible = "amlogic,meson8-sdio", "amlogic,meson-mx-sdio";
+ reg = <0xc1108c20 0x20>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clk_core>, <&clk_in>;
+ clock-names = "core", "clkin";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ slot@1 {
+ compatible = "mmc-slot";
+ reg = <1>;
+ bus-width = <4>;
+ };
+ };