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author | David S. Miller <davem@davemloft.net> | 2020-03-12 21:29:30 -0700 |
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committer | David S. Miller <davem@davemloft.net> | 2020-03-12 22:34:48 -0700 |
commit | 1d343579312311aa9875b34d5a921f5e2ec69f0a (patch) | |
tree | 64b636b5557d92f5266187f035dac34862db86d5 /Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt | |
parent | a8eceea84a3a3504e42f6495cf462027c5d19cb0 (diff) | |
parent | 0d81a3f29c0afb18ba2b1275dcccf21e0dd4da38 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Minor overlapping changes, nothing serious.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt')
-rw-r--r-- | Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt b/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt index f3893c4d3c6a..d2eada5044b2 100644 --- a/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt +++ b/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt @@ -27,7 +27,7 @@ Required properties of NAND chips: - reg: shall contain the native Chip Select ids from 0 to max supported by the cadence nand flash controller -See Documentation/devicetree/bindings/mtd/nand.txt for more details on +See Documentation/devicetree/bindings/mtd/nand-controller.yaml for more details on generic bindings. Example: |