diff options
author | Dave Airlie <airlied@redhat.com> | 2015-05-20 16:23:53 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2015-05-20 16:23:53 +1000 |
commit | bdcddf95e82b1c4e370fc1196b1f4f50f775dab4 (patch) | |
tree | ef2af2b3faee1f8e8287ca45d265809f56fbd0f6 /Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt | |
parent | 91d9f9856f91c82ac6289a0fff65dd12cfa07e34 (diff) | |
parent | e26081808edadfd257c6c9d81014e3b25e9a6118 (diff) |
Backmerge v4.1-rc4 into into drm-next
We picked up a silent conflict in amdkfd with drm-fixes and drm-next,
backmerge v4.1-rc5 and fix the conflicts
Signed-off-by: Dave Airlie <airlied@redhat.com>
Conflicts:
drivers/gpu/drm/drm_irq.c
Diffstat (limited to 'Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt')
-rw-r--r-- | Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt new file mode 100644 index 000000000000..2bee68103b01 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt @@ -0,0 +1,32 @@ +* MTD SPI driver for ST M25Pxx (and similar) serial flash chips + +Required properties: +- #address-cells, #size-cells : Must be present if the device has sub-nodes + representing partitions. +- compatible : May include a device-specific string consisting of the + manufacturer and name of the chip. Bear in mind the DT binding + is not Linux-only, but in case of Linux, see the "m25p_ids" + table in drivers/mtd/devices/m25p80.c for the list of supported + chips. + Must also include "jedec,spi-nor" for any SPI NOR flash that can + be identified by the JEDEC READ ID opcode (0x9F). +- reg : Chip-Select number +- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at + +Optional properties: +- m25p,fast-read : Use the "fast read" opcode to read data from the chip instead + of the usual "read" opcode. This opcode is not supported by + all chips and support for it can not be detected at runtime. + Refer to your chips' datasheet to check if this is supported + by your chip. + +Example: + + flash: m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,m25p80", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + m25p,fast-read; + }; |