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authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2019-05-20 14:00:57 +0530
committerLinus Walleij <linus.walleij@linaro.org>2019-05-24 13:50:47 +0200
commit13531e5d359e30d9e3d1cabd246a24cf6fdf084a (patch)
tree6d7e7bc5dcab6b0076385d35f57aab76e34df6bd /Documentation/devicetree/bindings/pinctrl
parentb22a7f85443e579367dfc2d7f4cb6aa863c3a709 (diff)
dt-bindings: pinctrl: Modify pinctrl memory map
Earlier, the PWM registers were included as part of the pinctrl memory map, but this turned to be useless as the muxing is being handled by the SoC pin controller itself. So, lets modify the pinctrl memory map to reflect the same. Fixes: 07b734fbdea2 ("dt-bindings: pinctrl: Add BM1880 pinctrl binding") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl')
-rw-r--r--Documentation/devicetree/bindings/pinctrl/bitmain,bm1880-pinctrl.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/bitmain,bm1880-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/bitmain,bm1880-pinctrl.txt
index ed34bb1ee81c..cc9a89aa4170 100644
--- a/Documentation/devicetree/bindings/pinctrl/bitmain,bm1880-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/bitmain,bm1880-pinctrl.txt
@@ -85,9 +85,9 @@ Required Properties:
spi0
Example:
- pinctrl: pinctrl@50 {
+ pinctrl: pinctrl@400 {
compatible = "bitmain,bm1880-pinctrl";
- reg = <0x50 0x4B0>;
+ reg = <0x400 0x120>;
pinctrl_uart0_default: uart0-default {
pinmux {