diff options
| author | Conor Dooley <conor.dooley@microchip.com> | 2023-01-25 11:09:32 +0000 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2023-01-25 11:09:32 +0000 |
| commit | d9c36d016f6112e636f18a49a5f779c7f8667deb (patch) | |
| tree | e68f80d3e73a82ecae265d91c275703e9d1c6914 /Documentation/devicetree/bindings/riscv | |
| parent | 093ee97e24f8555fbe678a20401de91fcd305ce4 (diff) | |
| parent | 497e6b37b0099dc415578488287fd84fb74433eb (diff) | |
Merge patch series "Add a devicetree for the Aldec PolarFire SoC TySoM"
As it says on the tin, add a DT for this board. It's been sitting on my
desk for a while, so may as well have it upstream...
The DT is only partially complete, as it needs the fabric content added.
Unfortunately, I don't have a reference design in RTL or SmartDesign
for it and therefore don't know what that fabric content is.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'Documentation/devicetree/bindings/riscv')
| -rw-r--r-- | Documentation/devicetree/bindings/riscv/microchip.yaml | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml index 714d0fcab399..4a29c890619a 100644 --- a/Documentation/devicetree/bindings/riscv/microchip.yaml +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -27,6 +27,7 @@ properties: - items: - enum: + - aldec,tysom-m-mpfs250t-rev2 - aries,m100pfsevp - microchip,mpfs-sev-kit - sundance,polarberry |