summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/soc
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2022-05-26 10:28:12 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2022-05-26 10:28:12 -0700
commitae862183285cbb2ef9032770d98ffa9becffe9d5 (patch)
treefcceed35ddadcab9100abcf830c09949cddab3c8 /Documentation/devicetree/bindings/soc
parentc011dd537ffe47462051930413fed07dbdc80313 (diff)
parent82706d6fb19d0b845146f7108fce3926502c5f52 (diff)
Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM DT updates from Arnd Bergmann: "There are 40 branches this time, adding a lot of new hardware support, and cleanups. Krzysztof Kozlowski continues his treewide cleanups. There are a number of new SoCs, all of them as part of existing families, and typically added along with a reference board: - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L general-purpose MPU. - Renesas RZ/V2M (R9A09G011) is a smart camera SoC - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76 cores and deep learning accerlation. - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7 and dual Wifi-6. - Corstone1000 is a generic platform from Arm that is used for designing custom SoCs, the support for now is for the Fixed Virtual Platform emulation for it. - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in upcoming Chromebooks. - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first MMU-less SoC to be added in a while New machines based on already supported SoCs this time are mainly for 32-bit platforms and include: - Two wireless routers based on Broadcom bcm4708 - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly for the industrial embedded market, and on NXP LS1021A based IOT board. - Two ethernet switches based on Microchip LAN966 - Eight Qualcomm Snapdragon based machines, including a smartwatch, a Chromebook board and some phones - Another phone based on the old ST-Ericsson Ux500 platform - Seven STM32MP1 based boards - Four single-board computers based on Rockchip RK3566/RK3568" * tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits) ARM: dts: kswitch-d10: enable networking ARM: dts: lan966x: add switch node ARM: dts: lan966x: add serdes node ARM: dts: lan966x: add reset switch reset node ARM: dts: lan966x: add MIIM nodes ARM: dts: lan966x: add hwmon node ARM: dts: lan966x: add basic Kontron KSwitch D10 support ARM: dts: lan966x: add flexcom I2C nodes ARM: dts: lan966x: add flexcom SPI nodes ARM: dts: lan966x: add all flexcom usart nodes ARM: dts: lan966x: add missing uart DMA channel ARM: dts: lan966x: add sgpio node ARM: dts: lan966x: swap dma channels for crypto node ARM: dts: lan966x: rename pinctrl nodes ARM: dts: at91: sama7g5: remove interrupt-parent from gic node ARM: dts: at91: use generic node name for dataflash ARM: dts: turris-omnia: Add atsha204a node arm64: dts: mt8192: Follow binding order for SCP registers arm64: dts: mediatek: add mtk-snfi for mt7622 arm64: dts: mediatek: mt8195-demo: enable uart1 ...
Diffstat (limited to 'Documentation/devicetree/bindings/soc')
-rw-r--r--Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml84
-rw-r--r--Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml104
-rw-r--r--Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml65
3 files changed, 253 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml
new file mode 100644
index 000000000000..563e1d0e327f
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml
@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX8MP HDMI blk-ctrl
+
+maintainers:
+ - Lucas Stach <l.stach@pengutronix.de>
+
+description:
+ The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
+ the NoC and ensuring proper power sequencing of the display pipeline
+ peripherals located in the HDMI domain of the SoC.
+
+properties:
+ compatible:
+ items:
+ - const: fsl,imx8mp-hdmi-blk-ctrl
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ '#power-domain-cells':
+ const: 1
+
+ power-domains:
+ minItems: 8
+ maxItems: 8
+
+ power-domain-names:
+ items:
+ - const: bus
+ - const: irqsteer
+ - const: lcdif
+ - const: pai
+ - const: pvi
+ - const: trng
+ - const: hdmi-tx
+ - const: hdmi-tx-phy
+
+ clocks:
+ minItems: 4
+ maxItems: 4
+
+ clock-names:
+ items:
+ - const: apb
+ - const: axi
+ - const: ref_266m
+ - const: ref_24m
+
+required:
+ - compatible
+ - reg
+ - power-domains
+ - power-domain-names
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx8mp-clock.h>
+ #include <dt-bindings/power/imx8mp-power.h>
+
+ blk-ctrl@32fc0000 {
+ compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon";
+ reg = <0x32fc0000 0x23c>;
+ clocks = <&clk IMX8MP_CLK_HDMI_APB>,
+ <&clk IMX8MP_CLK_HDMI_ROOT>,
+ <&clk IMX8MP_CLK_HDMI_REF_266M>,
+ <&clk IMX8MP_CLK_HDMI_24M>;
+ clock-names = "apb", "axi", "ref_266m", "ref_24m";
+ power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>,
+ <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>,
+ <&pgc_hdmimix>, <&pgc_hdmi_phy>;
+ power-domain-names = "bus", "irqsteer", "lcdif", "pai", "pvi", "trng",
+ "hdmi-tx", "hdmi-tx-phy";
+ #power-domain-cells = <1>;
+ };
diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml
new file mode 100644
index 000000000000..21d3ee486295
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX8MP Media Block Control
+
+maintainers:
+ - Paul Elder <paul.elder@ideasonboard.com>
+
+description:
+ The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral
+ providing access to the NoC and ensuring proper power sequencing of the
+ peripherals within the MEDIAMIX domain.
+
+properties:
+ compatible:
+ items:
+ - const: fsl,imx8mp-media-blk-ctrl
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ '#power-domain-cells':
+ const: 1
+
+ power-domains:
+ maxItems: 10
+
+ power-domain-names:
+ items:
+ - const: bus
+ - const: mipi-dsi1
+ - const: mipi-csi1
+ - const: lcdif1
+ - const: isi
+ - const: mipi-csi2
+ - const: lcdif2
+ - const: isp
+ - const: dwe
+ - const: mipi-dsi2
+
+ clocks:
+ items:
+ - description: The APB clock
+ - description: The AXI clock
+ - description: The pixel clock for the first CSI2 receiver (aclk)
+ - description: The pixel clock for the second CSI2 receiver (aclk)
+ - description: The pixel clock for the first LCDIF (pix_clk)
+ - description: The pixel clock for the second LCDIF (pix_clk)
+ - description: The core clock for the ISP (clk)
+ - description: The MIPI-PHY reference clock used by DSI
+
+ clock-names:
+ items:
+ - const: apb
+ - const: axi
+ - const: cam1
+ - const: cam2
+ - const: disp1
+ - const: disp2
+ - const: isp
+ - const: phy
+
+required:
+ - compatible
+ - reg
+ - '#power-domain-cells'
+ - power-domains
+ - power-domain-names
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx8mp-clock.h>
+ #include <dt-bindings/power/imx8mp-power.h>
+
+ media_blk_ctl: blk-ctl@32ec0000 {
+ compatible = "fsl,imx8mp-media-blk-ctrl", "syscon";
+ reg = <0x32ec0000 0x138>;
+ power-domains = <&mediamix_pd>, <&mipi_phy1_pd>, <&mipi_phy1_pd>,
+ <&mediamix_pd>, <&mediamix_pd>, <&mipi_phy2_pd>,
+ <&mediamix_pd>, <&ispdwp_pd>, <&ispdwp_pd>,
+ <&mipi_phy2_pd>;
+ power-domain-names = "bus", "mipi-dsi1", "mipi-csi1", "lcdif1", "isi",
+ "mipi-csi2", "lcdif2", "isp1", "dwe", "mipi-dsi2";
+ clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>;
+ clock-names = "apb", "axi", "cam1", "cam2", "disp1", "disp2",
+ "isp", "phy";
+ #power-domain-cells = <1>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
new file mode 100644
index 000000000000..ce2875c89329
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/renesas/renesas,rzg2l-sysc.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Renesas RZ/{G2L,V2L} System Controller (SYSC)
+
+maintainers:
+ - Geert Uytterhoeven <geert+renesas@glider.be>
+
+description:
+ The RZ/{G2L,V2L}-alike System Controller (SYSC) performs system control of
+ the LSI and supports following functions,
+ - External terminal state capture function
+ - 34-bit address space access function
+ - Low power consumption control
+ - WDT stop control
+
+properties:
+ compatible:
+ enum:
+ - renesas,r9a07g043-sysc # RZ/G2UL
+ - renesas,r9a07g044-sysc # RZ/G2{L,LC}
+ - renesas,r9a07g054-sysc # RZ/V2L
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: CA55/CM33 Sleep/Software Standby Mode request interrupt
+ - description: CA55 Software Standby Mode release request interrupt
+ - description: CM33 Software Standby Mode release request interrupt
+ - description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt
+
+ interrupt-names:
+ items:
+ - const: lpm_int
+ - const: ca55stbydone_int
+ - const: cm33stbyr_int
+ - const: ca55_deny
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ sysc: system-controller@11020000 {
+ compatible = "renesas,r9a07g044-sysc";
+ reg = <0x11020000 0x10000>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "lpm_int", "ca55stbydone_int", "cm33stbyr_int",
+ "ca55_deny";
+ };