Merge tag 'spi-v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi updates from Mark Brown:
 "The biggest change for SPI this release is the addition of offload
  support from David Lechner, allowing the hardware to trigger SPI
  transactions autonomously. The initial use case is for triggering IIO
  operations but there are other applications where having the hardware
  ready to go at a minimal signal is useful for synchronising with
  external inputs (eg, interrupt handling) or reducing latency (eg, CAN
  networking).

  Otherwise there's the usual fixes, improvements and cleanups, plus
  support for a bunch of new devices.

   - Support for offloading support from David Lechner

   - Support for GOcontrol1 Moduline modules, Mediatek MT7988, NXP
     i.MX94, Qualcomm SPI NAMD, Rockchip RK3562, Sophogo SG2044 and ST
     STM32 OSPI"

* tag 'spi-v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (59 commits)
  spi: spi-mem: Introduce a default ->exec_op() debug log
  spi: dt-bindings: cdns,qspi-nor: Require some peripheral properties
  spi: dt-bindings: cdns,qspi-nor: Deprecate the Cadence compatible alone
  spi: dt-bindings: cdns,qspi-nor: Be more descriptive regarding what this controller is
  spi: stm32-ospi: Include "gpio/consumer.h"
  MAINTAINERS: adjust the file entry in GOCONTROLL MODULINE MODULE SLOT
  spi: spi-qpic-snand: avoid memleak in qcom_spi_ecc_init_ctx_pipelined()
  spi: spi-mux: Fix coverity issue, unchecked return value
  spi: sophgo: fix incorrect type for ret in sg2044_spifmc_write()
  spi: sg2044-nor: fix uninitialized variable in probe
  spi: sg2044-nor: fix signedness bug in sg2044_spifmc_write()
  spi: sg2044-nor: Convert to dev_err_probe()
  spi: sg2044-nor: Fully convert to device managed resources
  dt-bindings: spi: add compatibles for mt7988
  spi: spidev: Add an entry for the gocontroll moduline module slot
  MAINTAINERS: add maintainer for the GOcontroll Moduline module slot
  dt-bindings: connector: Add the GOcontroll Moduline module slot bindings
  dt-bindings: vendor-prefixes: add GOcontroll
  spi: Use inclusive language
  spi: cadence-qspi: Improve spi memory performance
  ...

1 files changed, 83 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml
new file mode 100644
index 000000000000..aa3f93319203
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/qcom,spi-qpic-snand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm QPIC NAND controller
+
+maintainers:
+  - Md sadre Alam <quic_mdalam@quicinc.com>
+
+description:
+  The QCOM QPIC-SPI-NAND flash controller is an extended version of
+  the QCOM QPIC NAND flash controller. It can work both in serial
+  and parallel mode. It supports typical SPI-NAND page cache
+  operations in single, dual or quad IO mode with pipelined ECC
+  encoding/decoding using the QPIC ECC HW engine.
+
+allOf:
+  - $ref: /schemas/spi/spi-controller.yaml#
+
+properties:
+  compatible:
+    enum:
+      - qcom,ipq9574-snand
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 3
+
+  clock-names:
+    items:
+      - const: core
+      - const: aon
+      - const: iom
+
+  dmas:
+    items:
+      - description: tx DMA channel
+      - description: rx DMA channel
+      - description: cmd DMA channel
+
+  dma-names:
+    items:
+      - const: tx
+      - const: rx
+      - const: cmd
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
+    spi@79b0000 {
+        compatible = "qcom,ipq9574-snand";
+        reg = <0x1ac00000 0x800>;
+
+        clocks = <&gcc GCC_QPIC_CLK>,
+                 <&gcc GCC_QPIC_AHB_CLK>,
+                 <&gcc GCC_QPIC_IO_MACRO_CLK>;
+        clock-names = "core", "aon", "iom";
+
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        flash@0 {
+            compatible = "spi-nand";
+            reg = <0>;
+            #address-cells = <1>;
+            #size-cells = <1>;
+            nand-ecc-engine = <&qpic_nand>;
+            nand-ecc-strength = <4>;
+            nand-ecc-step-size = <512>;
+        };
+    };