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authorKrishna Kurapati <quic_kriskura@quicinc.com>2024-04-20 10:18:56 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2024-04-23 19:56:09 -0700
commit30a46746ca5a1ef4dad3ea72be4fd01872f89ac2 (patch)
tree231f1976bc306ebe960fac553996a03fe8295316 /Documentation/devicetree/bindings/usb/gr-udc.txt
parent89d7f962994604a3e3d480832788d06179abefc5 (diff)
usb: dwc3: core: Refactor PHY logic to support Multiport Controller
Currently the DWC3 driver supports only single port controller which requires at least one HS PHY and at most one SS PHY. But the DWC3 USB controller can be connected to multiple ports and each port can have their own PHYs. Each port of the multiport controller can either be HS+SS capable or HS only capable Proper quantification of them is required to modify GUSB2PHYCFG and GUSB3PIPECTL registers appropriately. DWC3 multiport controllers are capable to service at most 15 High Speed PHYs and 4 Supser Speed PHYs. Add support for detecting, obtaining and configuring PHYs supported by a multiport controller. Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com> Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20240420044901.884098-5-quic_kriskura@quicinc.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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