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authorKuldeep Singh <kuldeep.singh@nxp.com>2021-09-27 16:28:17 +0530
committerMark Brown <broonie@kernel.org>2021-10-29 18:56:02 +0100
commit28b5eaf9712bbed90c2b5a5608d70a16b7950856 (patch)
tree29b71eba79ddf9093461be5a2c3a107e2fed83d4 /Documentation/devicetree/bindings
parentb59c122484ecb1853882986e04d00bd879cfc051 (diff)
spi: Convert NXP flexspi to json schema
Convert the NXP FlexSPI binding to DT schema format using json-schema. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210927105818.445675-1-kuldeep.singh@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r--Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt44
-rw-r--r--Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml86
2 files changed, 86 insertions, 44 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt
deleted file mode 100644
index 8f34a7c7d8b8..000000000000
--- a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt
+++ /dev/null
@@ -1,44 +0,0 @@
-* NXP Flex Serial Peripheral Interface (FSPI)
-
-Required properties:
- - compatible : Should be "nxp,lx2160a-fspi"
- "nxp,imx8qxp-fspi"
- "nxp,imx8mm-fspi"
- "nxp,imx8mp-fspi"
- "nxp,imx8dxl-fspi"
-
- - reg : First contains the register location and length,
- Second contains the memory mapping address and length
- - reg-names : Should contain the resource reg names:
- - fspi_base: configuration register address space
- - fspi_mmap: memory mapped address space
- - interrupts : Should contain the interrupt for the device
-
-Required SPI slave node properties:
- - reg : There are two buses (A and B) with two chip selects each.
- This encodes to which bus and CS the flash is connected:
- - <0>: Bus A, CS 0
- - <1>: Bus A, CS 1
- - <2>: Bus B, CS 0
- - <3>: Bus B, CS 1
-
-Example showing the usage of two SPI NOR slave devices on bus A:
-
-fspi0: spi@20c0000 {
- compatible = "nxp,lx2160a-fspi";
- reg = <0x0 0x20c0000 0x0 0x10000>, <0x0 0x20000000 0x0 0x10000000>;
- reg-names = "fspi_base", "fspi_mmap";
- interrupts = <0 25 0x4>; /* Level high type */
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
- clock-names = "fspi_en", "fspi";
-
- mt35xu512aba0: flash@0 {
- reg = <0>;
- ....
- };
-
- mt35xu512aba1: flash@1 {
- reg = <1>;
- ....
- };
-};
diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml
new file mode 100644
index 000000000000..283815d59e85
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP Flex Serial Peripheral Interface (FSPI)
+
+maintainers:
+ - Kuldeep Singh <kuldeep.singh@nxp.com>
+
+allOf:
+ - $ref: "spi-controller.yaml#"
+
+properties:
+ compatible:
+ enum:
+ - nxp,imx8dxl-fspi
+ - nxp,imx8mm-fspi
+ - nxp,imx8mp-fspi
+ - nxp,imx8qxp-fspi
+ - nxp,lx2160a-fspi
+
+ reg:
+ items:
+ - description: registers address space
+ - description: memory mapped address space
+
+ reg-names:
+ items:
+ - const: fspi_base
+ - const: fspi_mmap
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: SPI bus clock
+ - description: SPI serial clock
+
+ clock-names:
+ items:
+ - const: fspi_en
+ - const: fspi
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ spi@20c0000 {
+ compatible = "nxp,lx2160a-fspi";
+ reg = <0x0 0x20c0000 0x0 0x100000>,
+ <0x0 0x20000000 0x0 0x10000000>;
+ reg-names = "fspi_base", "fspi_mmap";
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>;
+ clock-names = "fspi_en", "fspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+ spi-rx-bus-width = <8>;
+ spi-tx-bus-width = <8>;
+ };
+ };
+ };