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| author | Bjorn Helgaas <bhelgaas@google.com> | 2017-04-28 10:32:54 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-04-28 10:32:54 -0500 |
| commit | 7284a62dfd7066919bf9a7318f6dbc7b51a092db (patch) | |
| tree | 70692fb0b0e981e04419f35a389f44702f9c2023 /Documentation/devicetree | |
| parent | 4940421013672aafdc8c372c17b5ddf63423c805 (diff) | |
| parent | 7221547e55b7929e4d46983f6f3ca15f36ee4dac (diff) | |
Merge branch 'pci/host-imx6' into next
* pci/host-imx6:
PCI: imx6: Fix spelling mistake: "contol" -> "control"
PCI: imx6: Do not switch speed if Gen2 is disabled
PCI: imx6: Do not wait for speed change on i.MX7
PCI: imx6: Allow probe deferral by reset GPIO
PCI: imx6: Add code to support i.MX7D
Diffstat (limited to 'Documentation/devicetree')
| -rw-r--r-- | Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index 83aeb1f5a645..e3d5680875b1 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -4,7 +4,11 @@ This PCIe host controller is based on the Synopsis Designware PCIe IP and thus inherits all the common properties defined in designware-pcie.txt. Required properties: -- compatible: "fsl,imx6q-pcie", "fsl,imx6sx-pcie", "fsl,imx6qp-pcie" +- compatible: + - "fsl,imx6q-pcie" + - "fsl,imx6sx-pcie", + - "fsl,imx6qp-pcie" + - "fsl,imx7d-pcie" - reg: base address and length of the PCIe controller - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. @@ -34,6 +38,14 @@ Additional required properties for imx6sx-pcie: - clock names: Must include the following additional entries: - "pcie_inbound_axi" +Additional required properties for imx7d-pcie: +- power-domains: Must be set to a phandle pointing to PCIE_PHY power domain +- resets: Must contain phandles to PCIe-related reset lines exposed by SRC + IP block +- reset-names: Must contain the following entires: + - "pciephy" + - "apps" + Example: pcie@0x01000000 { |