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authorMatt Roper <matthew.d.roper@intel.com>2021-07-28 22:41:17 -0700
committerMatt Roper <matthew.d.roper@intel.com>2021-08-10 15:34:48 -0700
commit5798a769d6f5be656638c5e6e0cd5c4f155a2fb5 (patch)
treee7e929e94a7c669730c9ea9bddb09c04ed10d44b /Documentation/gpu/vgaarbiter.rst
parent0bb50de156d8280e53884adf1d5a04d6108f90e7 (diff)
drm/i915/gen12: Update shadowed register table
The bspec lists many shadowed registers (i.e., registers for which we don't need to grab forcewake when writing) that we weren't tracking in the driver. Although we may not actually use all of these registers right now, it's best to just match the bspec list exactly. Note that the bspec also lists registers that are shadowed for various HW-internal accesses; we can ignore those and just list the ones that are shadowed for accesses from the IA/CPU. Bspec: 52077 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210729054118.2458523-6-matthew.d.roper@intel.com
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