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| author | Kefeng Wang <wangkefeng.wang@huawei.com> | 2020-10-28 12:28:42 +0800 |
|---|---|---|
| committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2020-11-20 18:02:53 -0800 |
| commit | 31564b8b6dbaf9035d27131982d3296c10742baa (patch) | |
| tree | 6b72baf333debcaa2e14d62dd36ab5c40b97db1a /Documentation/locking | |
| parent | da815582cf4594e96defa1cddb72cd00b1e7aac5 (diff) | |
riscv: Add HAVE_IRQ_TIME_ACCOUNTING
RISCV_TIMER/CLINT_TIMER is required for RISC-V system, and it
provides sched_clock, which allow us to enable IRQ_TIME_ACCOUNTING.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'Documentation/locking')
0 files changed, 0 insertions, 0 deletions