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authorJernej Skrabec <jernej.skrabec@siol.net>2019-10-23 19:13:31 -0300
committerMauro Carvalho Chehab <mchehab+samsung@kernel.org>2019-10-24 19:07:59 -0300
commita4260ea49547aa0c84c353f9de5998a0315d89fe (patch)
treee379e266c29f5d9389b72f7766d0973705d0f1bf /Documentation/media
parent713e6a289f4244a6b063ef31689a9edc001ae398 (diff)
media: sun4i: Add H3 deinterlace driver
Allwinner H3 SoC contains deinterlace unit, which has several modes of operation - bypass, weave, bob and mixed (advanced) mode. I don't know how mixed mode works, but according to Allwinner it gives best results, so they use it exclusively. Currently this mode is also hardcoded here. For each interleaved frame queued, this driver produces 2 deinterlaced frames. Deinterlaced frames are based on 2 consequtive output buffers, except for the first 2, where same output buffer is given to peripheral as current and previous. There is no documentation for this core, so register layout and fixed values were taken from BSP driver. I'm not sure if maximum size of the image unit is capable to process is governed by size of "flag" buffers, frequency or it really is some HW limitation. Currently driver can process full HD image in ~15ms (7.5ms for each capture buffer), which allows to process 1920x1080@60i video smoothly in real time. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> [hverkuil-cisco@xs4all.nl: add static to deinterlace_ioctl_ops] Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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